Motorola pro7100 Manuel de service Page 31

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Theory of Operation 2-17
2.3.6.3 Voice Storage Option
The Voice Storage (VS) option can be used to store audio signals coming from the receiver or from
the microphone. Any stored audio signal can be played back over the radio’s speaker or sent out via
the radio’s transmitter.
The Voice Storage option can by placed on the controller section or on an additional option board
which resides on option board connector J0551. Voice Storage IC U0301 provides all required
functionality and is powered from 3.3 volts regulator U0351 which is powered from the regulated 5
volts. Dual shottky diode D0301 reduces the supply voltage for U0301 to 3 volts. The µP controls
U0301 via SPI bus lines CLK (U0301-8), DATA (U0301-10) and MISO (U0301-11). To transfer data,
the µP first selects the U0301 via address decoder U0141, line VS CS and U0301 pin 9. Then the µP
sends data through line DATA and receives data through line MISO. Pin 2 (RAC) of U0301 indicates
the end of a message row by a low state for 12.5 ms and connects to µP pin 52. A low at pin 5 (INT),
which is connected to µP pin 55 indicates that the Voice Storage IC requires service from the µP.
Audio, either from the radio’s receiver or from one of the microphone inputs, emerges the ASFIC
CMP (U0221) at pin 43, is buffered by op-amp U0341-1, then enters the voice storage IC U0301 at
pin 25. During playback, the stored audio emerges U0301 at pin 20. To transmit the audio signal, it is
fed through resistive divider R0344 / R0345 and line VS MIC to input selector IC U0251. When this
path is selected by the µP via ASFIC CMP port GCB 4, the audio signal enters the ASFIC CMP at
pin 48 and is processed like normal transmit audio. To play the stored audio over the radio’s speaker,
the audio from U0301 pin 20 is buffered by op-amp U0341-2 and fed via switch U0342 and line FLAT
RX SND to ASFIC CMP pin 10 (UIO). In this case, this ASFIC CMP pin is programmed as input and
feeds the audio signal through the normal receiver audio path to the speaker or handset. Switch
U0342 is controlled by the µP via ASFIC CMP port GCB 4 and feeds the stored audio only to the
ASFIC CMP port UIO when it is programmed as input.
2.4 UHF (403-470 MHz) Receiver Front-End
The receiver is able to cover the UHF range from 403 to 470 MHz. It consists of four major blocks:
front-end bandpass filters and preamplifier,
•First mixer
1st IF
2nd IF
Receiver back-end
Two varactor tuned bandpass filters perform antenna signal pre-selection. A cross over quad diode
mixer converts the signal to the 1st IF of 44.85 MHz. Low side first injection is used.
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