Motorola pro7100 Manuel de service télécharger pdf (Page 44)

2-30 Theory of Operation

2.8.8 Power Control

The transmitter uses the power control IC (PCIC, U3501) to control the power output of the radio. A

portion of the forward and reflected RF power from the transmitter is sampled by the directional

coupler, rectified and summed, to provide a dc voltage to the RFIN port of the PCIC (pin 1) which is

proportional to the sampled RF power.

The ASFIC contains a digital to analog converter (DAC) which provides a reference voltage of the

control loop to the PCIC via R3517. The reference voltage level is programmable through the SPI

line of the PCIC. This reference voltage is proportional to the desired power setting of the transmitter,

and is factory programmed at several points across the frequency range of the transmitter to offset

frequency response variations of the transmitter’s power detector circuit.

The PCIC provides a dc output voltage at pin 4 (INT) which is amplified and shifted in dc level by

stages Q3501 and Q3502. The 0 to 4 Vdc range at U1503, pin 4 is translated to a 0 to 8.5 Vdc range

at the output of Q3501, and applied as VCONT to the power-adjust input pin of the first transmitter

stage U3401. This adjusts the transmitter power output to the intended value. Variations in forward or

reflected transmitter power cause the dc voltage at pin 1 to change, and the PCIC adjusts the control

voltage above or below its nominal value to raise or lower output power.

Capacitors C3502-4, in conjunction with resistors and integrators within the PCIC, control the

transmitter power-rise (key-up) and power-decay (de-key) characteristic to minimize splatter into

adjacent channels.

U3502 is a temperature-sensing device, which monitors the circuit board temperature in the vicinity

of the transmitter driver and final devices, and provides a dc voltage to the PCIC (TEMP, pin 29)

proportional to temperature. If the dc voltage produced exceeds the set threshold in the PCIC, the

transmitter output power is reduced so as to reduce the transmitter temperature.

2.9 Frequency Synthesis

The frequency synthesizer subsystem consists of the reference oscillator (Y3261 or Y3262), the Low

Voltage Fractional-N synthesizer (LVFRAC-N, U3201), and the voltage-controlled oscillators and

buffer amplifiers (U3301, Q3301-2 and associated circuits).

2.9.1 Reference Oscillator

The reference oscillator (Y3262) contains a temperature compensated crystal oscillator with a

frequency of 16.8 MHz. An analog-to-digital (A/D) converter internal to U3201 (LVFRAC-N) and

controlled by the µP via serial interface (SRL) sets the voltage at the warp output of U3201 (pin 25) to

set the frequency of the oscillator. The output of the oscillator (U3262 pin 3) is applied to pin 23

(XTAL1) of U3201 via R3263 and C3235.

In applications were less frequency stability is required, the oscillator inside U3201 is used along

with an external crystal Y3261, varactor diode D3261, C3261, C3262 and R3262. In this case,

Y3262, R3263, C3235 and C3251 are not used. When Y3262 is used, Y3261, D3261, C3261,

C3262 and R3262 are not used, and C3263 is increased to 0.1 uF.

2.9.2 Fractional-N Synthesizer

The LVFRAC-N synthesizer IC (U3201) consists of a pre-scaler, a programmable loop divider, control

divider logic, a phase detector, a charge pump, an A/D converter for low frequency digital

modulation, a balance attenuator to balance the high frequency analog modulation and low

frequency digital modulation, a 13 volt positive voltage multiplier, a serial interface for control, and

finally a super filter for the regulated 5 volts.

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Motorola pro7100 Manuel de service Page 44

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