Motorola MPC564EVB Manuel d'utilisateur télécharger pdf (Page 13)

SG1001–13

HOST AND COMMUNICATIONS

PROCESSORS

HOST PROCESSORS

Product Packaging Speed

(MHz)

Apps

Modr

Rev Process 100%

MAG

Voltage

Core

Voltage

IO/tol

(V)

SOQ MPQ POQ Additional

Information

Architecture

107

XPC107A

503-ball PX (PBGA) 66, 100 L D=1.4 Hip3 2.5 ±5% 2.5/3.3 2 24 120

60x to PCI Bridge, memory controller with

support for SDRAM, ROM. I

0, I

C support.

PowerPC ISA

603R

MPC603R

255-ball RX (CBGA)

255-ball ZT (PBGA)

255-ball RX (CBGA)

200, 266, 300

200

200, 266

C=2.1

Hip3

2.5 ±5%

3.3/5

300

32-bit superscaler MPU with dual 16K

instruction and data caches, single/double

precision IEEE FPU 2.5 V core and 3.3 V I/O.

PowerPC ISA

745B

XPC745B

255-ball PX (PBGA) 300, 350 L E=2.8 Hip4 2.0 ±0.1 V 3.3 1 1 60

32-bit superscalar MPU with dual 32K

instruction and data caches, single/double

precision IEEE FPU, 32-/64-bit external data

bus. Features enhanced for embedded

applications.

PowerPC ISA

755B

XPC755B

360-ball PX (PBGA)

360-ball RX (CBGA)

300, 350, 400

350, 400

E=2.8

Hip4

2.0 ±0.1 V

3.3

220

32-bit superscalar MPU with dual 32K

instruction and data caches, single/double

precision IEEE FPU, 32-/64-bit external data

bus, external L2 cache interface (up to

1MByte) with integrated controller and cache

tags. Direct Mapped SRAM capability, cache

locking. Features enhanced for embedded

applications.

PowerPC ISA

7410

MPC7410

MPC7410T

360-ball RX (CBGA)

400, 450

400, 450, 500

E=1.4

Hip6

1.5 ±0.05 V

1.8 ±0.1 V

2.5/3.3

220

Features similar to the MPC7400 with 32-/64-

bit L2 bus support and direct-mapped SRAM

capability. High bandwidth 133 MHz 64-bit

MPX/60x bus interface. Extended

Temperature -40 to 105

°C.

PowerPC ISA

7441

XPC7441

360-ball RX (CBGA) 600, 700 L E=2.1 Hip6 1.5 ±0.05 V 1.8/2.5 0 44 220

7450 derivative with no external L3 cache. PowerPC ISA

7445

XPC7445A

360-ball RX (CBGA) 600, 733, 800,

933, 1000

L E=3.2 Hip6 1.3 V 1.8/2.5 1 1 44

Designed to be pin-compatible with

Motorola’s MPC7441, the MPC7445 includes

256KB of integrated L2 cache and with no

external L3 cache. Product utilizes silicon-on-

insulator process technology, enabling

processor to deliver increased performance

and lower power capabilities. Block address

translation (BAT) registers increased from 4

to 8; cache way locking added to the L1

caches.

PowerPC ISA

1 2 ... 8 9 10 11 12 13 14 15 16 17 18 ... 35 36

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Motorola MPC564EVB Manuel d'utilisateur Page 13

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