Motorola MPC564EVB Manuel d'utilisateur Page 11
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Chapter 1. MPC564 EVB Board 1-1
Chapter 1
MPC564 EVB Board
The MPC564EVB is an MPC564-based evaluation board that can be used for the development and
test of microcontroller systems
1
(see Figure 1-1). The MPC564 is a member of the Motorola
MPC500 RISC microcontroller family. It is a 32-bit processor with a 32-bit internal address bus
and 32 lines of data.
The evaluation board is a development and test platform for software and hardware for the
MPC564
1
. The system provides for development of target applications for the similar MPC561,
MPC562, or MPC563 microcontrollers also. It can be used by software and hardware developers
to test programs, tools, or circuits without having to develop a complete microcontroller system
themselves. All special features of the MPC564
1
are supported.
The heart of the evaluation board is the MPC564. The MPC564EVB has 512Kbyte (128K x 32)
external SRAM for development or application memory, 2Mbyte (512K x 32) external Flash
memory, and numerous hardware expansion possibilities. The MPC564EVB board also provides
an Ethernet interface (10/100BaseT), TouCAN, and RS232 interface in addition to the built-in I/O
functions of the MPC564
1
device for programming and evaluating the attributes of the micropro-
cessor. To support development and test, the evaluation board can be connected to debuggers and
emulators produced by different manufacturers.
The MPC564EVB provides for low cost software testing with the use of a ROM resident debug
monitor, dBUG, programmed into the external Flash device. Operation allows the user to load
code in the on-board RAM, execute applications, set breakpoints, and display or modify registers
or memory. After software is operational, the user may program the MPC564 Internal Flash
EEPROM or the on-board FLASH memory for dedicated operation of new software application.
No additional hardware or software is required for basic operation. For high level debug, exten-
sive third-party tools are available for the MPC500 series. The Nexus and BDM debug ports are
available to connect the tool sets.
Specifications
Clock: 66 MHz Maximum
1
, 4Mhz reference
Operating temperature: 0°C to +70°C
Power requirement: 6 – 26V DC @ 300 ma Typical
Power output: 5.8V @ 1.5A output with 5V, 3.3V, and 2.6V regulated supplies
Board Size: 7.00 x 7.60 inches, 8 layers
1
The MPC564EVB can be used to emulate the MPC533 and MPC534. See Appendix A and MPC564CZP66
Electrical Spec for limitations.
Frees
cale Semiconductor,
I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
nc...
- MPC564EVB User’s Manual 1
- Cautionary Notes 4
- Contents 10
- Chapter 1 11
- Freescale Semiconductor, Inc 12
- 1.1 Processor 13
- 512 Kbytes 14
- 1.2.5 MPC564EVB Memory Map 15
- 1.2.2 SRAM 15
- 1.2.3 Internal SRAM 15
- 1.2.4 Internal Flash 15
- 1.3 Support Logic 18
- 1.3.4 Exception Sources 19
- 1.3.5 TA Generation 19
- 1.3.6 User’s Program 19
- MPC564 signal 20
- 1.4.2 CAN PORTs and Options 22
- 1.4.3 10/100T Ethernet Port 24
- MPC564 I/O SIGNAL 29
- 1.5.3 User Components 31
- 1.6 Reference Documents 38
- 1.7 Software Development 38
- 2.1 System Configuration 39
- 6 - 26 V 40
- Input Power 40
- RS-232 Terminal 40
- 2.2 Installation And Setup 41
- Power Port Connections 42
- +VIN DC supply 42
- GND +VIN VIGN 43
- (CONFIG_SW) 46
- Chapter 3 51
- 3.2 Operational Procedure 52
- 3.2.2 System Initialization 54
- 3.3 Command Line Usage 56
- 3.4 Commands 56
- ASM Assembler 58
- BC Block Compare 59
- BF Block Fill 60
- BM Block Move 61
- BR Breakpoints 62
- BS Block Search 63
- DC Data Conversion 64
- DI Disassemble 65
- DL Download Console 66
- DLDBUG Download dBUG 67
- DN Download Network 68
- FL Erase/Program Flash 69
- GO Execute 70
- GT Execute To 71
- HELP Help 72
- IRD Internal Register Display 73
- IRM Internal Register Modify 74
- LR Loop Read 75
- LW Loop Write 76
- MD Memory Display 77
- MM Memory Modify 78
- MMAP Memory Map Display 79
- RD Register Display 80
- RM Register Modify 81
- SET Set Configurations 83
- SHOW Show Configurations 84
- STEP Step Over 85
- SYMBOL Symbol Name Management 86
- TRACE Trace Into 87
- 3.5 System Call Functions 89
- 3.5.3 IN_STAT 90
- 3.5.4 ISR_REGISTER 90
- 3.5.5 ISR_REMOVE 90
- 3.5.6 EXIT_TO_dBUG 91
- Appendix A 93
- Appendix B 95
- Configuring dBUG for Network 95
- Downloads 95
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