Motorola CPCI-6115 Manuel de service Page 106
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Noté. / 5. Basé sur avis des utilisateurs
CPCI-6115 CompactPCI Single Board Computer Installation and Use (6806800A68D)
Transition Module Preparation and Installation Ethernet Interface (CompactPCI Version)
104
The CPCI-6115-MCPTM also routes the IDE signals to the host I/O connector of PMC I/O
module 2. Refer to Jumper Settings on page 102 for more details.
Currently available CompactFlash memory cards provide from 2MB to 512MB. Once
configured, this memory appears as a standard ATA (IDE) disk drive.
5.7.2 Ethernet Interface (CompactPCI Version)
The CPCI-6115 SBC provides three 10/100/1000Base-T Ethernet interfaces. Two of them are
routed to the transition module and one is routed to the front panel.
The Ethernet Station Addresses are determined by the CPCI-6115 SBC and are not affected
by the CPCI-6115-MCPTM.
5.7.3 Hot-Swap Support
The CPCI-6115-MCPTM is considered to be part of the CPCI-6115 SBC. Therefore, the CPCI-
6115-MCPTM cannot be swapped without first removing or powering down the CPCI-6115
SBC. All power for the CPCI-6115-MCPTM is provided from the CPCI-6115 SBC through pins
on the J3 I/O connector.
5.7.4 Serial EEPROM
The CPCI-6115-MCPTM contains a 512 x 8 Serial EEPROM. The Serial EEPROM provides for
storage of the transition module configuration information. The default I2C address for this
EEPROM is $A8, but optional resistors can be used allowing population options to configure
this part to respond to any standard I2C address.
5.7.5 PMC I/O Modules
CPCI-6115 SBC supports two single-wide PMC sites. Each site provides four 64-pin EIA-E700
AAAB connectors to interface to a 32/64-bit IEEE P1386.1 PMC. One of the four connectors is
dedicated to user I/O. Two PMC I/O modules are supported on the CPCI-6115-MCPTM, one
per PMC site on the CPCI-6115 SBC. The CPCI-6115 SBC maps the PMC user I/O pins onto
the CompactPCI J3 and J5 connectors. The CPCI-6115-MCPTM reverses the mapping and
brings the signals to a 64-pin EIA-E700 AAAB connector to interface with the PMC I/O module.
This causes a one-to-one correspondence in the pinout between the PMC on the CPCI-6115
SBC and the PMC I/O module on the CPCI-6115-MCPTM. Refer to the section titled PMC I/O
Module for a detailed description of PMC I/O modules.
5.7.6 Asynchronous Serial Ports
The CPCI-6115 SBC contains two asynchronous serial ports that are routed to the J5 user I/O
connector. Serial port 1 (COM1) is also wired as an RS-232 interface to an RJ-45 connector on
the front panel. A jumper (J6) on the CPCI-6115-MCPTM enables the COM1 port either on the
CPCI-6115 SBC or the transition module. One version of the CPCI-6115-MCPTM employs four
RJ-45 connectors on the rear panel of the transition module for COM1, COM2, COM3 and
COM4 respectively. Note: only COM1 and COM2 can be used.
- CPCI-6115 CompactPCI 1
- Single Board Computer 1
- Trademarks 2
- Contents 3
- List of Tables 10
- List of Figures 11
- About this Manual 13
- Abbreviations 14
- Conventions 16
- Summary of Changes 17
- Comments and Suggestions 18
- Safety Notes 19
- Operation 20
- Installation 20
- Cabling and Connectors 21
- Environment 22
- Sicherheitshinweise 23
- Schaltereinstellungen/Jumper 24
- Kabel und Stecker 26
- Umweltschutz 26
- Batterie 26
- Introduction 27
- 1.2 Standard Compliances 28
- 1.3 Ordering Information 29
- 2.1 Overview 31
- Requirements 32
- 2.3.2 Power Requirements 34
- 2.3.3 Thermal Requirements 34
- 2.4 Getting Started 37
- 2.5 Baseboard Preparation 38
- 2.5.3 J6, Bus Mode Selection 40
- 2.5.7 J20, Safe Start Header 42
- 2.6 Operating Modes 44
- 2.7 Installing Hardware 44
- Procedure 45
- Personal Injury or Death 46
- 2.9 Applying Power 49
- 3.1 Overview 51
- 3.2 Board Layout 52
- 3.4 ABORT/Reset Switch 54
- 3.5.7 CompactPCI Connector 58
- PCI_RSVD = PCI Reserved pin 62
- 3.5.14 Safe Start Header 67
- 3.5.15 Bus Mode Select Header 67
- 3.5.18 +/-12 V Present Header 68
- Functional Description 69
- 4.2 Block Diagram 70
- 4.3 General Description 71
- 4.3.2 Processor 72
- 4.3.3 L3 Cache 72
- 4.3.4.12 Interrupt Controller 76
- 4.3.4.13 PCI Bus Arbitration 76
- 4.3.4.14 Board Reset Logic 77
- 4.3.5 System Memory 81
- 4.3.6 Flash Memory 82
- 4.3.8 TL16C550C UART Devices 83
- 4.3.9 System Registers 83
- 4.3.10 Serial EEPROM Devices 83
- 4.3.11 PCI Bus 0.0 83
- 4.3.12 PCI Bus 1.0 83
- 4.3.13 IDE Controller 84
- 4.3.15 CompactPCI Bus 84
- 4.3.16 PMC Slots 84
- 4.4 Miscellaneous 86
- 4.4.3 Onboard Power Supplies 89
- 4.4.4 Hot Swap Support 89
- 4.4.5 Hot Swap Process 89
- 5.2 Block Diagram 92
- 5.4 Rear Panel Connectors 94
- 5.5.2.1 Host IO Connectors 96
- 5.5.2.2 PMC I/O Connectors 98
- 5.6 Jumper Settings 104
- 5.7 Functional Description 105
- 5.7.3 Hot-Swap Support 106
- 5.7.4 Serial EEPROM 106
- 5.7.5 PMC I/O Modules 106
- 5.7.7 PMC I/O Module 110
- 5.7.9 PMC I/O Connector 112
- 5.7.10 Host I/O Connector 112
- 5.8 Installing the PIM 113
- Figure 5-9 Installing the PIM 114
- Remote Start via the PCI Bus 117
- MOTLoad Firmware 119
- 7.4 MOTLoad Commands 120
- 7.6 MOTLoad Tests 120
- 7.7 Using MOTLoad 121
- 7.7.2 Command Line Help 122
- 7.7.3 Command Line Rules 122
- 7.8 MOTLoad Command List 123
- Memory Maps 127
- 8.2.2 Processor Memory Map 128
- 8.2.3 Default PCI Memory Map 129
- 8.2.5 System I/O Memory Map 131
- 8.2.7 CompactPCI Memory Map 131
- 8.2.9 L1, L2 and L3 Cache 132
- 8.2.10 System Memory 132
- A Related Documentation 133
- A.3 Related Specifications 134
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