Motorola CPCI-6115 Manuel de service Page 150

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Memory Maps and Addresses
CPCI-6200 Installation and Use (6806800J66C)
150
7.4.7 Interrupt Mask Register
This register is used to enable or disable interrupts from the CPCI CPLD, IPMI Controller, RTC,
TEMP sensor and Abort switch. This register can be read or written by the system software.
TEMP_INT Interrupt fromTemperature Sensor
1 Temp sensor interrupt is asserted.
0 Temp sensor interrupt is not asserted.
ABORT Abort Status. This bit reflects the current state of the
onboard abort signal. This is a debounced version of the
abort switch and may be used to determine the state of the
abort switch.
1 Abort push button switch is pressed for less
than three seconds.
0 Abort push button switch is not pressed.
Table 7-16 Interrupt Register 2 Field Definition
Table 7-17 Interrupt Mask Register, 0xF200_0006
Bit Field Operation Reset
7RSVD R 0
6RSVD R 0
5RSVD R 0
4 CPCI_PLD_INT_MASK R/W 1
3 IPMI_INT_MASK R/W 1
2RTC_INT_MASK R/W 1
1TEMP_INT_MASK R/W 1
0ABORT_MASK R/W 1
Table 7-18 Interrupt Mask Register
RSVD Reserved
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