Motorola CPCI-6115 Manuel de service Page 86
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Functional Description
CPCI-6200 Installation and Use (6806800J66C)
86
4.14 Clock Distribution
The clock function generates and distributes all of the clocks that are required for system
operation.
The PCI Express clocks are generated using an eight-output differential clock driver. The
PCI/PCI-X bus clocks are generated by the bridge chips from the PCI Express clock. Additional
clocks required by individual devices are generated near the devices using individual
oscillators.
Figure 4-9 CPCI-6200 Clock Distribution Diagram
Clock
Buffer
25MHz
Osc
Diff
Clock
Gen.
(ICS9F
G108)
PHY 1
PHY 1
LBPC CPLD
PCIe Switch
PCI1, TSi384 PMC 1
25MHz
25MHz
25MHz
25MHz
PCIE0_CLK, 100MHz
PCIE1_CLK, 100MHz CLK_PCI1, 133/100/66MHz
PCI2, TSi384 PMC 2
PCIE2_CLK, 100MHz CLK_PCI2, 100/66/33MHz
PCI4, TSi381
USB
PCIE4_CLK, 100MHz CLK_PCI4, 33MHz
48 M H z
Osc
Processor
8572
PCIe Expan.
PCIE7_CLK, 100MHz
PCIE5_CLK, 100MHz
PCI3, TSi384
PCIE3_CLK, 100MHz
PCIE6_CLK, 100MHz,
Not Used
66 .6 /
100 M H z
Osc
125 M H z
Osc
SYSCLK
Ethernet
DDR3_CLK1
DDR3_CLK2
PCIe
MPC
9446
PCI
6466
Clock
Buffer
CY2309
QA0
QA1
QB0
CPCI
CPLD
QC0
PCI_BP_CLK0, 33/66MHz
66.6
MHz
Osc
10 M H z
Osc
SMUX CPLD
1. 8MH z
Osc
Reset CPLD
8MHz
Osc
H8S IPMI
C_PLD_CLK, 66MHz
PCI_BP_CLK1, 33/66MHz
PCI_BP_CLK2, 33/66MHz
PCI_BP_CLK3, 33/66MHz
PCI_BP_CLK4, 33/66MHz
PCI_BP_CLK5, 33/66MHz
PCI_BP_CLK6, 33/66MHz
P_PB_CLK, 66MHz
CLK_PCI3, 66MHz
S_PB_CLK
33/66MHz
10 M H z
Osc
COM 3/4
TL16C552
QC2
CLK_DDR, 66MHz
DDR CLK
32 . 6KHz
Crystal
RTC
M41T83
1 MHz
J1 /
J2
DDR3
SO-
DIMM
DDR3
SO-
DIMM
RTC
J5-D19MXCLK
66 .6 M Hz
Osc
(Not Used)
- CPCI-6200 1
- Trademarks 2
- Contact Address 2
- Contents 3
- List of Tables 10
- List of Figures 13
- About this Manual 15
- Conventions 18
- Summary of Changes 19
- Introduction 21
- 1.2 Standard Compliances 24
- 1.3 Mechanical Data 26
- 1.4 Ordering Information 26
- 1.5 Product Identification 27
- Chapter 2 29
- 2.1 Overview 29
- 2.4 Power Requirements 31
- 2.5 Installing Accessories 32
- PMC Filler Plate 33
- PMC Alignment 33
- Voltage Key 33
- 2.6.3 Hardware Configuration 35
- 2.10 Factory-Installed Linux 42
- Chapter 3 45
- 3.1 Board Layout 45
- 3.2 Front Panel 46
- 3.3 Connectors and Headers 47
- 3.3.1 CPCI Bus Connector, J1 48
- 3.3.2 CPCI Bus Connector, J2 49
- 3.3.4 CPCI Connector, J4 51
- 3.3.7 Ethernet Connector 58
- 3.3.8 USB Connector 58
- 3.4 Switches 66
- 3.5 Front Panel LEDs 67
- 3.6 Status Indicators 68
- Functional Description 71
- 4.4 System Memory 74
- 4.5 Timers 75
- 4.6 Ethernet Interfaces 75
- 4.7 Local Bus Interface 75
- 4.7.3 Control and Timers PLD 77
- 4.8 DUART Interface 78
- 4.9 PCI Express Port 79
- 4.10 PCI/PCI-X Bus 80
- 4.11 Operation Modes 81
- 4.11.1 System Controller Mode 82
- 4.11.2 Peripheral Mode 82
- 4.11.3 Stand Alone Mode 83
- 4.12 PCI Express Expansion 84
- 4.13 System Interrupts 85
- 4.14 Clock Distribution 86
- 4.15 MPC8572 System Clock 87
- 4.16 Reset Control Logic 87
- 4.16.1 Abort/Reset Switch 89
- 4.16.2 Reset Timing 90
- 4.17 RTC Battery 91
- 4.18 IPMI Controller 91
- 4.19 Programmable Devices 93
- 4.19.1 Local Bus Control CPLD 94
- 4.19.2 Reset CPLD 94
- 4.19.3 CPCI Control CPLD 94
- 5.4 MOTLoad Commands 96
- 5.6 MOTLoad Tests 96
- 5.7 Using MOTLoad 97
- 5.7.2 Command Line Help 99
- 5.7.3 Command Line Rules 99
- 5.8 MOTLoad Command List 100
- MOTLoad Firmware 101
- Control via IPMI 107
- 6.1.3 IPMI Messaging Commands 108
- 6.1.4 SEL Device Commands 108
- 6.1.5 SDR Repository Commands 109
- 6.1.6 FRU Inventory Commands 109
- 6.1.7 Sensor Device Commands 110
- 6.2 PICMG 2.9 Commands 111
- 6.3 Emerson Specific Commands 112
- 6.3.2 OEM Commands 115
- 6.3.2.1 BMC/PM Change Role 116
- 6.4 FRU Information 118
- 6.5 Sensor Description 118
- Memory Maps and Addresses 137
- 7.2 CPCI-6200 Memory Map 138
- 7.4 System I/O Memory Map 140
- 7.4.1 System Status Register 143
- 7.4.2 System Control Register 144
- 7.4.5 Interrupt Register 1 148
- 7.4.6 Interrupt Register 2 149
- 7.4.7 Interrupt Mask Register 150
- 7.4.23 PLD Revision Register 167
- 7.4.24 PLD Date Code Register 168
- 7.4.25 Test Register 1 168
- 7.4.26 Test Register 2 169
- 7.4.27.2 Control Registers 170
- 7.4.27.3 Compare Registers 171
- 7.4.27.4 Counter Registers 172
- 7.5 Interrupt Controller 173
- C Device Addresses 174
- 7.7 PCI/PCI-X Configuration 175
- Replacing the Battery 179
- A.2 Replacing the Battery 180
- Related Documentation 181
- B.3 Related Specifications 183
- Safety Notes 185
- Installation 186
- Operation 187
- Hot Swap 188
- Sicherheitshinweise 189
- System Installation 191
- Batterie 192
- © 2009 Emerson Electric Co 196
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