Motorola MVME172 Manuel de service

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Page 1 - Installation and Use

MVME172VME Embedded ControllerInstallation and Use VME172A/IH1

Page 2 - Restricted Rights Legend

172Bug Vector Table and Workspace 4-13Examples 4-14Hardware Functions 4-14Exception Vectors Used by 172Bug 4-15Exception Vector Tables 4-16Using 172B

Page 3

4-10Using the 172Bug Debugger44By using one of the offset registers, the disassembled code addresses can be made to match the listing file addresses a

Page 4 - Safety Depends On You

Entering and Debugging Programs4-1144Note These logical port numbers (0, 1, 2, and 3) are shown in the pinouts of the MVME as ÒSERIAL PORT 1Ó, ÒSERIA

Page 5

4-12Using the 172Bug Debugger44Alternately, the program may have been previously created using the 172Bug MM command as outlined above and stored to t

Page 6

Preserving the Debugger Operating Environment4-1344Preserving the Debugger Operating EnvironmentThis section explains how to avoid contaminating the o

Page 7 - Contents

4-14Using the 172Bug Debugger44With the exception of the first 1024-byte vector table area, you must be extremely careful not to use the above-mention

Page 8

Preserving the Debugger Operating Environment4-1544Exception Vectors Used by 172BugThe exception vectors used by the debugger are listed below. These

Page 9 - Port Numbers 4-10

4-16Using the 172Bug Debugger44Example: Trace one instruction using debugger. Exception Vector TablesNotice in the preceding example that the value of

Page 10

Preserving the Debugger Operating Environment4-1744Using 172Bug Target Vector TableThe 172Bug initializes and maintains a vector table area for target

Page 11 - List of Figures

4-18Using the 172Bug Debugger44exception handler is not used. This provides diagnostic support in the event that your program is stopped by an unexpec

Page 12 - List of Tables

Floating Point Support4-1944Your program must make sure that there is an exception stack frame in the stack and that it is exactly the same as the pro

Page 13 - Description

List of Figures MVME172 Block Diagram 1-14MVME172 Switch, Header, Connector, Fuse, and LED Locations 2-3DB-25 DTE-to-RJ-45 Adapter 2-17DB-25 DCE-to-R

Page 14

4-20Using the 172Bug Debugger44Valid data types that can be used when modifying a floating point data register or a floating point memory location:Whe

Page 15 - Document Set for MVME172

Floating Point Support4-2144Single Precision RealThis format would appear in memory as:A single precision number takes 4 bytes in memory. Double Preci

Page 16

4-22Using the 172Bug Debugger44Scientific NotationThis format provides a convenient way to enter and display a floating point decimal number. Internall

Page 17

The 172Bug Debugger Command Set4-2344The 172Bug Debugger Command SetThe 172Bug debugger commands are summarized in Table 4-3. The command syntax is sh

Page 18

4-24Using the 172Bug Debugger44DMA DMA Block of Memory MoveDMA range addr vdir am blk [; B|W|L]DS One Line Disassembler DS addr [:count | addr]DU Dump

Page 19 - Features

The 172Bug Debugger Command Set4-2544MAR Load Macros MAR [controller LUN] [device LUN][del block #]MD Memory Display MD [S] addr [:count | addr] [; [B

Page 20

4-26Using the 172Bug Debugger44RB ROMboot Enable RB [; V]NORB ROMboot Disable NORBRD Register Display RD {[+|-|=] [dname] [/]} {[+|-|=][reg1[-reg2]] [

Page 21 - Specifications

AA-1AConfigure and EnvironmentCommandsConfigure Board Information BlockCNFG [;[I][M]] This command is used to display and configure the board informatio

Page 22 - Cooling Requirements

A-2Configure and Environment CommandsAAStatic Memory Mezzanine (PWA) Serial Number = " " ECC Memory Mezzanine #1 Artwork (PWA) Identifie

Page 23 - Introduction

Set Environment to Bug/Operating SystemA-3AeAeModification is permitted by using the M option of the command. At the end of the modification session,

Page 24 - Manual Terminology

xii List of Tables MVME172 SpeciÞcations 1-9Local Bus Arbitration Priority 1-26Local Bus Memory Map 1-28Local I/O Devices Memory Map 1-30EPROM/Flash

Page 25 - Block Diagram

A-4Configure and Environment CommandsAAIf the ENV command is invoked with no options on the command line, you are prompted to configure all operationa

Page 26

Set Environment to Bug/Operating SystemA-5AeAeAuto Boot at power-up only [Y/N]Y Auto Boot is attempted at power up reset only. Auto Boot Controller LU

Page 27 - Functional Description

A-6Configure and Environment CommandsAANetwork Auto Boot Enable [Y/N]N Network Auto Boot function is disabled. Network Auto Boot at power-up only [Y/N

Page 28 - Microprocessor

Set Environment to Bug/Operating SystemA-7AeAeMemory Search Ending Address00100000 Top limit of the Bug's search for a work page. If a contiguous

Page 29 - Memory Options

A-8Configure and Environment CommandsAAMemory Search Delay AddressFFFFD20F Default address is $FFFFD20F. This is the MVME172 GCSR GPCSR0 as accessed t

Page 30

Set Environment to Bug/Operating SystemA-9AeAeBase Address of Dynamic Memory00000000 Beginning address of Dynamic Memory (Parity and/or ECC type memor

Page 31

A-10Configure and Environment CommandsAASlave Starting Address #1 00000000 Base address of the local resource that is accessible by the VMEbus. Defaul

Page 32

Set Environment to Bug/Operating SystemA-11AeAeMaster Enable #1 [Y/N] Y Yes, setup and enable the Master Address Decoder #1. Master Starting Address #

Page 33 - I/O Interfaces

A-12Configure and Environment CommandsAAMaster Starting Address #3 00000000 Base address of the VMEbus resource that is accessible from the local bus.

Page 34

Set Environment to Bug/Operating SystemA-13AeAeMaster Control #4 00 DeÞnes the access characteristics for the address space deÞned with this master ad

Page 35

1 1-1 1Board Level HardwareDescription Introduction This chapter describes the board level hardware features of the MVME172 VME Embedded Controller.

Page 36 - Local Resources

A-14Configure and Environment CommandsAAConfiguring the IndustryPacksENV asks the following series of questions to set up IndustryPacks (IP) on MVME172

Page 37

Set Environment to Bug/Operating SystemA-15AeAeBase address for mapping IP modules. Only the upper 16 bits are significant. IP D/C/B/A Memory Size

Page 38 - Connectors

A-16Configure and Environment CommandsAAIP D/C/B/A Interrupt 0 Control = 00000000? Define the interrupt control requirements for the IP modules channe

Page 39 - Memory Maps

Set Environment to Bug/Operating SystemA-17AeAeENV warning example:WARNING: Memory MAP Overlap Condition ExistsS-Address E-Address Enable Overlap M-Ty

Page 40

A-18Configure and Environment CommandsAA

Page 41

BB-1BDisk/Tape Controller DataDisk/Tape Controller Modules SupportedThe following VMEbus disk/tape controller modules are supported by the 172Bug. The

Page 42

B-2Disk/Tape Controller DataBBDisk/Tape Controller Default ConfigurationsNote SCSI Common Command Set (CCS) devices are only the ones tested by Motorol

Page 43

Disk/Tape Controller Default ConfigurationsB-3BBeMVME328 -- 14 DevicesController LUN Address Device LUN Device Type6 $FFFF9000 00081018202830SCSI Comm

Page 44

B-4Disk/Tape Controller DataBBIOT Command Parameters for Supported Floppy TypesThe following table lists the proper IOT command parameters for floppie

Page 45 - VMEbus Memory Map

IOT Command Parameters for Supported Floppy TypesB-5BBe Number of Logical Blocks (100 in size)09F8 0500 05A0 0B40 12C0 1680 2D00Number of Bytes in Dec

Page 46

1-2Board Level Hardware Description1 Input/Output (I/O) signals are routed through industry-standard connectors on the MVME172 front panel; no adapte

Page 47 - Installation

B-6Disk/Tape Controller DataBB

Page 48

CC-1CNetwork ControllerDataNetwork Controller Modules SupportedThe following VMEbus network controller modules are supported by the MVME172BUG. The de

Page 49 - Hardware Preparation

C-2Network Controller DataeCCe

Page 50

IN-3IndexNumerics172Bug 4-1debugger command set 4-23description of 3-1implementation of 3-3172Bug (MVME172Bug) 2-2172Bug implementation 3-3172Bug stac

Page 51

IndexIN-4INDEXConfigure (CNFG) and Environment(ENV) commands A-1Configure Board Information Block (CN-FG) A-1configuringbase addresses of IndustryPack

Page 52

IN-5INDEXEPROM and Flash memory 1-20EPROM sockets 2-5EPROM/Flash configuration header(J12) 2-5EPROM/Flash mapping Ñ256K x 8EPROMs 2-7EPROM/Flash mappi

Page 53

IndexIN-6INDEXIntel 82596 LAN coprocessor Ethernetdriver 3-19interrupt acknowledge (IACK) 2-14Interrupt Stack Pointer (ISP) 3-14interrupts 1-25introdu

Page 54

IN-7INDEXNVRAM (Non-Volatile RAM) A-3Oobject code 4-11offset registers 4-8operating environment 4-13operational parameters A-3option field 4-4overview

Page 55

IndexIN-8INDEXSYSFAIL* assertion/negation 3-12system calls 3-17system considerations 2-14system console 3-5system controller function 3-5system contro

Page 56

Introduction1-31 Related Documentation The MVME172 ships with an installation and use manual (the document you are presently reading, Motorola Public

Page 57 - Memory Mezzanine Options

1-4Board Level Hardware Description1 Other Applicable Motorola Publications The following publications are applicable to the MVME172 and may provide

Page 58 - Installation Instructions

Introduction1-51 Applicable Non-Motorola Publications The following non-Motorola publications are also available from the sources indicated. 292099

Page 59 - MVME172 Installation

1-6Board Level Hardware Description1 NCR 53C710 SCSI I/O Processor Data Manua l,order number NCR53C710DMNCR CorporationMicroelectronics Products Div

Page 60 - System Considerations

Introduction1-71 Requirements These boards are designed to conform to the requirements of the following documents: ❏ VME64 Specification, VITA ❏ EIA

Page 61

Notice While reasonable efforts have been made to assure the accuracy of this document, Motorola, Inc. assumes no liability resulting from any omissi

Page 62

1-8Board Level Hardware Description1 ❏ I/O Ð Optional SCSI Bus interface with DMA Ð Four serial ports with EIA-232-D interface (serial port controlle

Page 63

Introduction1-91 Specifications Table 1-1 lists the specifications for an MVME172 without IPs. Table 1-1. MVME172 Specifications Characteristics Spe

Page 64

1-10Board Level Hardware Description1 Cooling Requirements The Motorola MVME172 VME Embedded Controller is specified, designed, and tested to operate

Page 65 - Information

Introduction1-111 Special Considerations for Elevated-Temperature Operation The following information is for users whose applications for the MVME172

Page 66 - Debugger General Information

1-12Board Level Hardware Description1Manual TerminologyThroughout this manual, a convention is used which precedes data and address parameters by a ch

Page 67 - Installation and Startup

Block Diagram1-131The terms control bit and status bit are used extensively in this document. The term control bit is used to describe a bit in a regi

Page 68

1-14Board Level Hardware Description1Figure 1-1. MVME172 Block DiagramVMEchip2VMEbusInterfaceIP2IndustryPackInterfacei82596CAEthernetController53C710

Page 69

Functional Description1-151Functional DescriptionThis section contains a functional description of the major blocks on the MVME172. Front Panel Switch

Page 70

1-16Board Level Hardware Description1Data Bus StructureThe local bus on the MVME172 is a 32-bit synchronous bus that is based on the MC68060 bus, and

Page 71 - Autoboot

Functional Description1-171No VMEbus Interface OptionThe MVME172 may be operated as an embedded controller without the VMEbus interface. To support th

Page 72

Preface This document provides general information and basic installation instructions for the MVME172 VME Embedded Controller (which is available in

Page 73 - Network Boot

1-18Board Level Hardware Description1Most DRAM devices require some number of access cycles before the DRAMs are fully operational. Normally this requ

Page 74 - Restarting the System

Functional Description1-191The SRAM is controlled by the MC2chip, and the access time is programmable. Refer to the MC2chip description in the MVME172

Page 75

1-20Board Level Hardware Description1!WarningLithium batteries incorporate inflammable materials such aslithium and organic solvents. If lithium batte

Page 76 - MPU Clock Speed Calculation

Functional Description1-211Battery Backed Up RAM and ClockAn M48T58 RAM and clock chip is used on the MVME172. This chip provides a time-of-day clock,

Page 77 - Memory Requirements

1-22Board Level Hardware Description1Serial Communications InterfaceThe MVME172 uses two Zilog Z85230 serial port controllers to implement the four se

Page 78 - Disk I/O Support

Functional Description1-231latency period, buffer overrun may occur if the DMA is programmed to access the VMEbus. Therefore, the 82596CA should not b

Page 79 - Disk I/O via 172Bug Commands

1-24Board Level Hardware Description1SCSI TerminationIt is important that the SCSI bus is properly terminated at both ends.The MVME172 main board prov

Page 80

Functional Description1-251by software within the programmed time or they will time out. The watchdog timers may be programmed to generate a SYSRESET

Page 81

1-26Board Level Hardware Description1The access timer logic is duplicated in the VMEchip2 and MC2chip ASICs. Because the local bus timer in the VMEchi

Page 82 - Disk I/O Error Codes

Memory Maps1-271signals. The memory mezzanine board is plugged into two 100-pin connectors. The Ethernet LAN connector (J9) is a 15-pin socket connect

Page 83 - Network I/O Support

Safety SummarySafety Depends On You The following general safety precautions must be observed during all phases of operation, service, andrepair of t

Page 84

1-28Board Level Hardware Description1Normal Address RangeThe memory map of devices that respond to the normal address range is shown in the following

Page 85 - Multiprocessor Support

Memory Maps1-291$FFFF0000-$FFFFFFFF VMEbus A16 D32/D16 64KB ? 2, 4Notes1. Devices mapped at $FFF80000-$FFF9FFFF also appear at $00000000- $001FFFFF w

Page 86 - $804 ****(MPAR)

1-30Board Level Hardware Description1Table 1-4 describes the "Local I/O Devices" portion of the local bus main memory map.Note The IP2 chip

Page 87 - GCSR Method

Memory Maps1-311$FFF58100 - $FFF5817F IP2 IP_b I/O D16 128B 1$FFF58180 - $FFF581FF IP2 IP_b ID Read D16 128B 1$FFF58200 - $FFF5827F IP2 IP_c I/O D1

Page 88 - Manufacturing Test Process

1-32Board Level Hardware Description1$FFFBD000 - $FFFBFFFF Reserved - - 12KB 4$FFFC0000 - $FFFCFFFF M48T58 (BBRAM, TOD Clock) D32-D8 64KB 1, 9$FFFD000

Page 89

Memory Maps1-331VMEbus Memory MapThis section describes the mapping of local resources as viewed by VMEbus masters. Default addresses for the slave, m

Page 90

1-34Board Level Hardware Description1

Page 91 - 172Bug Debugger

22-12Hardware Preparation andInstallationIntroductionThis chapter provides unpacking instructions, hardware preparation guidelines, and installation i

Page 92

2-2Hardware Preparation and Installation22Chapter 4, and/or in the MVME172 VME Embedded Controller Programmer's Reference Guide as listed in Rela

Page 93 - ".RETURN"

Hardware Preparation2-322Figure 2-1. MVME172 Switch, Header, Connector, Fuse, and LED LocationsS1 S2P1A1B1C1A32B32C322011 9702MVME172-2XXPRIMARY SIDE

Page 94 - Syntactic Variables

All Motorola PWBs (printed wiring boards) are manufactured by UL-recognized manufacturers, with a ßammability rating of 94V-0.!WARNING This equipment

Page 95

2-4Hardware Preparation and Installation22System Controller Select Header (J1)The MVME172 is factory-configured as a VMEbus system controller (i.e., a

Page 96 - Address Formats

Hardware Preparation2-522Note Pins 7-8 (GPIO3) are reserved to select either the Flash memory map (jumper installed) or the EPROM memory map (jumper r

Page 97

2-6Hardware Preparation and Installation22J20151216J20151216J20151216J20151216J20151216CONFIGURATION 1: 128K x 8 EPROMs CONFIGURATION 2: 256K x 8 EPRO

Page 98

Hardware Preparation2-722The next five tables show the address range for each EPROM socket in all five configurations. GPIO3 (J21 pins 7-8) is a contr

Page 99 - MD 1327C;DI

2-8Hardware Preparation and Installation22SRAM Backup Power Source Select Headers (J14)Header J14 determines the source for onboard static RAM backup

Page 100 - Port Numbers

Hardware Preparation2-922Note For MVME172s without the optional VMEbus interface (i.e., without the VMEchip2 ASIC), you must select the onboard batter

Page 101 - ❏ Read the program from disk

2-10Hardware Preparation and Installation22SCSI Terminator Enable Header (J12)The MVME172 provides terminators for the SCSI bus. The SCSI terminators

Page 102 - Read the Program from Disk

Hardware Preparation2-1122Memory Mezzanine OptionsTwo 100-pin connectors (J15 and J16) are provided on the MVME172 to accommodate optional memory mezz

Page 103 - Environment

2-12Hardware Preparation and Installation22Installation InstructionsThis section covers:❏ Installation of IndustryPacks (IPs) on the MVME172❏ Installa

Page 104 - Hardware Functions

Installation Instructions2-1322Ð Bring the IP cables out the narrow slot in the MVME172 front panel and attach them to the appropriate external equipm

Page 106 - Using the 172Bug Debugger

2-14Hardware Preparation and Installation225. Secure the MVME172 in the chassis with the screws provided, making good contact with the transverse moun

Page 107 - ❏ Manually with GO command

Installation Instructions2-1522the system must be handled by the MC68060/MC68LC060 software. Refer to the memory maps in the MVME172 VME Embedded Cont

Page 108

2-16Hardware Preparation and Installation22The following circuits are protected by solid-state fuses that reset during overload conditions: LAN AUI, S

Page 109 - Floating Point Support

Installation Instructions2-1722Figure 2-2 diagrams the pin assignments required in a cable to adapt a DB-25 DTE device to the RJ-45 connectors.Figure

Page 110

2-18Hardware Preparation and Installation22Figure 2-4 diagrams the pin assignments required in a typical 8-conductor serial cable having RJ-45 connect

Page 111 - Double Precision Real

33-13Debugger GeneralInformationOverview of M68000 FirmwareThe firmware for the M68000-based (68K) series of board and system level products has a com

Page 112 - Scientific Notation

3-2Debugger General Information33❏ A user interface that accepts commands from the system console terminal. When using 172Bug, you operate out of eith

Page 113

172Bug Implementation3-333172Bug ImplementationMVME172Bug is written largely in the "C" programming language, providing benefits of portabil

Page 114 - ; B

3-4Debugger General Information33These readable jumpers are read as a register (at $FFF4202D) on the MC2chipASIC. The bit values are read as a zero wh

Page 115 - Display/Modify

Installation and Startup3-533Note that when the MVME172 comes up in a cold reset, 172Bug runs in Board Mode. Using the Environment (ENV) or MENU comma

Page 116

Contents Introduction 1-1Overview 1-1Related Documentation 1-3Document Set for MVME172 1-3Other Applicable Motorola Publications 1-4Non-Motorola Peri

Page 117 - Commands

3-6Debugger General Information335. If you want to connect devices (such as a host computer system and/or a serial printer) to the other EIA-232-D por

Page 118

Autoboot3-733AutobootAutoboot is a software routine that is contained in the 172Bug Flash/PROM to provide an independent mechanism for booting an oper

Page 119 - Y response must be

3-8Debugger General Information33!Caution Although streaming tape can be used to autoboot, the samepower supply must be connected to the streaming tap

Page 120

Network Boot3-933❏ Your routine must pass a checksum test, which ensures that this routine was really intended to receive control at powerup. For comp

Page 121

3-10Debugger General Information33Restarting the SystemYou can initialize the system to a known state in three different ways: reset, abort, and break

Page 122

Restarting the System3-1133AbortAbort is invoked by pressing and releasing the ABORT switch on the MVME172 front panel. Whenever abort is invoked when

Page 123

3-12Debugger General Information33SYSFAIL* Assertion/NegationUpon a reset/powerup condition the debugger asserts the VMEbus SYSFAIL* line (refer to th

Page 124

Memory Requirements3-1333Memory RequirementsThe program portion of 172Bug is approximately 512KB of code, consisting of download, debugger, and diagno

Page 125

3-14Debugger General Information33172Bug requires a minimum of 64KB of contiguous read/write memory to operate. The ENV command controls where this bl

Page 126

Disk I/O Support3-1533The sector defines the unit of information for the media itself, as viewed by the controller. The sector size varies for differe

Page 127

Local Bus Timeout 1-25Local Bus Arbiter 1-26Connectors 1-26Memory Maps 1-27Local Bus Memory Map 1-27Normal Address Range 1-28VMEbus Memory Map 1-33VM

Page 128

3-16Debugger General Information33IOI (Input/Output Inquiry)This command is used to probe the system for all possible CLUN/DLUN combinations and displ

Page 129

Disk I/O Support3-1733Disk I/O via 172Bug System CallsAll operations that actually access the disk are done directly or indirectly by 172Bug TRAP #15

Page 130 - Configuring the IndustryPacks

3-18Debugger General Information33Refer to the system call descriptions in the Debugging Package for Motorola 68K CISC CPUs User's Manual for det

Page 131

Network I/O Support3-1933Network I/O SupportThe Network Boot Firmware provides the capability to boot the CPU through the Flash/PROM debugger using a

Page 132

3-20Debugger General Information33RARP/ARP Protocol ModulesThe Reverse Address Resolution Protocol (RARP) basically consists of an identity-less node

Page 133 - ENV warning example:

Multiprocessor Support3-2133Network I/O Error Codes172Bug returns an error code if an attempted network operation is unsuccessful. Multiprocessor Supp

Page 134

3-22Debugger General Information33You can only program Flash memory by the MPCR method. Refer to the .PFLASH system call in the MVME172Bug Debugging P

Page 135 - BDisk/Tape Controller Data

Multiprocessor Support3-2333An ASCII G placed in the MPCR by a remote processor indicates that the Go Direct type of transfer is requested. An ASCII B

Page 136

3-24Debugger General Information33and Status Registers (LCSR) of the MVME172. The execution address is formed by reading the GCSR general purpose regi

Page 137

Manufacturing Test Process3-2533None of these tests harm the product or system into which a board is installed. Entering an ASCII break on the console

Page 138 - Floppy Types

Blocks Versus Sectors 3-14Device Probe Function 3-15Disk I/O via 172Bug Commands 3-15IOI (Input/Output Inquiry) 3-16IOP (Physical I/O to Disk) 3-16IO

Page 139

3-26Debugger General Information33

Page 140 - Disk/Tape Controller Data

44-14Using the172Bug DebuggerThis Chapter Covers❏ Entering debugger command lines❏ Entering and debugging programs❏ Calling system utilities from user

Page 141 - CNetwork Controller

4-2Using the 172Bug Debugger44Note The presence of the upward caret ( ^ ) before a character indicates that the Control (CTRL) key must be held down

Page 142 - Network Controller Data

Entering Debugger Command Lines4-344For example, if a breakpoint has been specified, then control returns to the debugger when the breakpoint is encou

Page 143 - Numerics

4-4Using the 172Bug Debugger44Debugger Command SyntaxIn general, a debugger command is made up of the following parts:❏ The command identifier (i.e.,

Page 144

Entering Debugger Command Lines4-544Expression as a ParameterAn expression can be one or more numeric values separated by the arithmetic operators: pl

Page 145

4-6Using the 172Bug Debugger44Valid expression examples:The total value of the expression must be between 0 and $FFFFFFFF. Address as a ParameterMany

Page 146

Entering Debugger Command Lines4-744Note In commands with range specified as addr addr, and with size option W or L chosen, data at the second (endin

Page 147

4-8Using the 172Bug Debugger44Offset RegistersEight pseudo-registers (R0 through R7) called offset registers are used to simplify the debugging of rel

Page 148

Entering Debugger Command Lines4-944Example: A portion of the listing file of an assembled, relocatable module is shown below: The above program was l

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