Motorola DSP56305 Manuel d'utilisateur Page 80
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- MARQUE LIVRES
Noté. / 5. Basé sur avis des utilisateurs
Pipeline Interlocks
Address Generation Pipeline Interlocks
MOTOROLA Optimizing DSP56300/DSP56600 Applications 6-7
6.2 ADDRESS GENERATION PIPELINE
INTERLOCKS
There are sequences related to the Address Generation Unit that
cause the insertion of one, two or three pipeline interlock cycles.
These paragraphs describe what are these sequences and suggest
few ways to avoid them in the application.
6.2.1 What are the Address Generation Pipeline
Interlocks
There are two types of Address Generation pipeline interlock:
• Tcc Interlock is caused by a Transfer On-Condition (Tcc)
instruction that specified one of the address registers as its
destination. If the following instruction specifies the same
address registers as its source operand, than the execution of
this instruction will be delayed by one instruction cycle.
Example:
Tcc A1,B r0,r1 ;Tcc instruction. R1 is
;conditional destination
move r1,x0 ;R1 is source operand
• Address Generation Interlock is caused by a MOVE
instruction that uses one of the AGU registers R0–R7 for
address generation, while one of the three preceding
instructions used one of the register-set (Ri, Ni or Mi)
members as a destination register.
Example:
move #addr,R0 ;R0 is destination
move #offset,N0 ;N0 is destination
move X:(r0)+,y1 ;Instruction uses R0
Up to three interlock cycles are added to the execution of the
instruction that caused the interlock, depending on the distance (in
instruction words) between this instruction and the preceding
instruction that used one of the register set members (Ri, Ni or Mi)
as a destination register. In the example above, the distance is 0,
thus three interlock cycles will be added. In the next example, only
one interlock cycle will be added to the execution of the first MPY
- DSP56300/DSP56600 1
- Digital Signal 1
- Processors 1
- TABLE OF CONTENTS 2
- LIST OF FIGURES 6
- LIST OF TABLES 7
- INTRODUCTION 8
- 1.2 DSP56600 CORE FAMILY 9
- Table 1-1 11
- Introduction 12
- Description and Use 13
- Application Note Structure 14
- 1.4.3 Appendixes 15
- DATA OPERATIONS 16
- DSP56300 Family Manual 21
- 2.3 THE MAX INSTRUCTION 22
- 2.4 USING THE BARREL SHIFTER 23
- Data Operations 24
- Using the barrel shifter 24
- DSP56300 26
- DSP56600 Family 26
- Double precision arithmetic 27
- INSTRUCTIONS 28
- PROGRAM CONTROL 30
- Program Control 31
- Hardware Loops 31
- 3.2 THE HARDWARE STACK 32
- DSP56600 Family Manuals 35
- 3.3 USING THE STACK EXTENSION 36
- Using the Stack Extension 37
- EXTENSION 39
- Conditional DALU Instructions 40
- 3.6 PC RELATIVE INSTRUCTIONS 42
- DSP56600 Family Manual 43
- 3.7 USING FAST INTERRUPTS 46
- Using Fast Interrupts 48
- USING THE DMA 50
- Using the DMA 51
- Using Slow, Low-Cost Memories 54
- 4.4 SERVICING A PERIPHERAL 55
- Servicing a Peripheral 56
- Section 5 62
- 5.1 THE INSTRUCTION CACHE 62
- 5.1.1 Cache Sectors 64
- The Instruction Cache 65
- 5.1.3 Cache Burst Mode 67
- 5.2 MEMORY SWITCH 70
- Memory Switch 71
- 5.3 USING THE BOOTSTRAP ROM 72
- Using the Bootstrap ROM 73
- PIPELINE INTERLOCKS 74
- Pipeline Interlocks 75
- Data ALU Pipeline Interlocks 75
- DSP56000 Family Manual 76
- INTERLOCKS 80
- Interlocks 80
- 6.3 STACK EXTENSION DELAYS 81
- Interlocks? 83
- COMPACT OPCODE USE 86
- Instructions 87
- Compact Opcode Use 89
- Cycle Count of an Instruction 89
- 7.2 ADDRESSING MODES 90
- 7.2.2 Short Addressing Mode 91
- 7.2.3 Short Immediate Mode 91
- 7.2.5 Register Addressing 92
- 7.2.6 Word Count 92
- 7.3 PERIPHERAL ADDRESSING 92
- 7.4 SPECIAL INSTRUCTIONS 93
- 7.4.1 Dual Data Spaces 93
- 7.4.3 Clearing Registers 94
- Special Instructions 95
- SAVING POWER 96
- A.1.2 Stop Standby Mode 97
- A.1.3 Low-Power Clock Divider 97
- Saving Power 98
- Disabling Functional Blocks 98
- DEBUG AND TEST SUPPORT 100
- B.2 JTAG PORT FEATURES 101
- B.3 ADDRESS TRACING 102
- Debug and Test Support 103
- Address Tracing 103
- USING THE PROFILER 104
- C.3 THE PROFILING REPORT 105
- C.3.1 Basic Report 105
- C.3.2 Symbol Report 106
- Using the Profiler 107
- C.3.4 Code Coverage Report 108
- C.3.5 Basic Subroutine Report 109
- C.3.8 Subroutine Call Report 111
- C.4 USING THE PROFILE REPORT 111
- How to reach us: 112
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