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System Memory Controller (SMC)
3
Use the following table to convert SPD bytes 27, 29 and 30 to the
correct values for tras, trp, trcd
and trc.
Do not actually update these bits in the Hawk at this time. You will
use the information from this step later.
Table 3-18. Deriving tras, trp, trcd
and trc Control Bit Values from SPD
Information
Control Bits Parameter Parameter Expressed
in CLK Periods
Possible Control Bit Values
$FEF800D1
bits 2,3
(tras
)
tRAS
(SPD Byte 30)
tRAS_CLK = tRAS/T
(T = CLK Period
in nanoseconds)
See Notes 1, 2 and 9
0.0 < tRAS_CLK <= 4.0 tras
=%00
4.0 < tRAS_CLK <=5.0 tras
=%01
5.0 < tRAS_CLK <= 6.0 tras
=%10
6.0 < tRAS_CLK <= 7.0 tras =%11
7.0 < tRAS_CLK Illegal
$FEF800D2
bit 3
(trp
)
tRP
(SPD Byte 27)
tRP_CLK = tRP/T
(T = CLK Period
in nanoseconds)
See Notes 3, 4 and 9
0.0 < tRP_CLK <= 2 trp
=%0
2.0 < tRP_CLK <= 3 trp
=%1
3 < tRP_CLK Illegal
$FEF800D2
bit 7
(trcd
)
tRCD
(SPD Byte 29)
tRCD_CLK = tRCD/T
(T = CLK Period
in nanoseconds)
See Notes 5, 6 and 9
0.0 < tRCD_CLK <= 2 trcd
=%0
2.0 < tRCD_CLK <= 3 trcd =%1
3 < tRCD_CLK Illegal
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