Vital Product Data (VPD) Introduction
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B
VPD Data Definitions - L2 Cache Configuration Data
The L2 cache configuration data packet consists of byte fields that show
the size, organization, and type of the L2 cache memory array. The
following table(s) further describe the L2 cache memory configuration
VPD data packet.
Table B-4. L2 Cache Configuration Data
Byte
Offset
Field
Size
(Bytes)
Field Mnemonic Field Description
00 2 L2C_MID Manufacturer’s Identifier (FFFF =
Undefined/Not-Applicable)
02 2 L2C_DID Manufacturer’s Device Identifier (FFFF =
Undefined/Not-Applicable)
04 1 L2C_DDW Device Data Width (e.g., 8-bits, 16-bits, 32-bits,
64-bits, 128-bits)
05 1 L2C_NOD Number of Devices Present
06 1 L2C_NOC Number of Columns (Interleaves)
07 1 L2C_CW Column Width in Bits
This will always be a multiple of the device’s data
width.
08 1 L2C_TYPE L2 Cache Type:
00 - Arthur Backside
01 - External
02 - In-Line
09 1 L2C_ASSOCIATE Associative Microprocessor Number (If
Applicable)
0A 1 L2C_OPERATIONMODE Operation Mode:
00 - Either Write-Through or Write-Back (S/W
Configurable)
01 - Either Write-Through or Write-Back (H/W
Configurable)
02 - Write-Through Only
03 - Write-Back Only
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