Motorola MVME2400 Series Manuel de service Page 88

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2-30 Computer Group Literature Center Web Site
Hawk PCI Host Bridge & Multi-Processor Interrupt Controller
2
The PHB performs contiguous I/O addressing when the MEM bit is clear
and the IOM bit is clear. The PHB takes the PPC address, apply the offset
specified in the XSOFFx register, and map the result directly to PCI.
The PHB performs spread I/O addressing when the MEM bit is clear and
the IOM bit is set. The PHB takes the PPC address, applies the offset
specified in the MSOFFx register, and maps the result to PCI as shown in
Figure 2-6.
.
Figure 2-6. PCI Spread I/O Address Translation
Spread I/O addressing allows each PCI device’s I/O registers to reside on
a different PPC memory page, so device drivers can be protected from
each other using memory page protection.
All I/O accesses must be performed within natural word boundaries. Any
I/O access that is not contained within a natural word boundary results in
unpredictable operation. For example, an I/O transfer of four bytes starting
at address $80000010 is considered a valid transfer. An I/O transfer of four
bytes starting at address $80000011 is considered an invalid transfer since
it crosses the natural word boundary at address $80000013/$80000014.
1915 9702
PPC Address + Offset
31 12 11 5 4 0
31 0
PCI Address
25 24
0 0 0 0 0 0 0
0000000
54
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