Motorola M68CPU32BUG Manuel d'utilisateur Page 1

MOTOROLA SEMICONDUCTOR DEVICE TUTORIAL Order this document byMC68332TUT/D  MOTOROLA INC, 1995 An Introduction to the MC68332 By Sharon Darley, Mar

MOTOROLA MC68332TUT/D10 Figure 5 DC Model of Oscillator Circuit2.5.2.3 Layout and Strange Behavior Oscillator layout is just as important as a good

MC68332TUT/D MOTOROLA112.5.2.4 XFC and VDDSYNNoise on the XFC, VDDSYN, and VSSI pins causes frequency shifts in CLKOUT. The XFC filter capacitor andt

MOTOROLA MC68332TUT/D12or, on the other hand, a working oscillator could be moved into a region of no oscillation at all. Therefore, itis important t

MC68332TUT/D MOTOROLA13Figure 8 Typical MC68332 Reset CircuitWhen the internal PLL is used to generate the internal system clock, the RESET pin works

MOTOROLA MC68332TUT/D142.7 Power SupplyAlways connect all power and ground pins to power sources. Since internal power buses only serve about8 - 10 p

MC68332TUT/D MOTOROLA15Figure 10 Using LVI Devices with Multiple Power Supplies2.8 Designing for Electromagnetic CompatibilityBecause of the fast clo

MOTOROLA MC68332TUT/D16Figure 11 Pinout of MC68332 132 Pin PackageTo control power supply/ground noise, use dedicated ground and supply planes. When

MC68332TUT/D MOTOROLA17Another way to control power supply noise created by the MCU is to put a small inductor in series with thepower supply lines f

MOTOROLA MC68332TUT/D18• Use ferrite chokes when troubleshooting. Placing a choke around a signal line and the return conduc-tor carrying a different

MC68332TUT/D MOTOROLA19Chip-select access time (MCU read cycle) = (2 + WS) X tCYC(min) - tCLSA(max) - tDICL(min)Chip-select access time (MCU write cy

MOTOROLA MC68332TUT/D2 1 INTRODUCTION ...12

MOTOROLA MC68332TUT/D202.9.2 Using Chip-Select Signals to Enable Boot MemoryThe MCU CSBOOT chip-select circuit is always enabled from reset. Because

MC68332TUT/D MOTOROLA212.9.3.1 How to Construct Word Memory from Two Byte MemoriesFor chip-select signals other than CSBOOT, forming word memory that

MOTOROLA MC68332TUT/D22Figure 15 Configuring 16-Bit Memory with 8-Bit RAMs — Separate Read and Write Enables2.10 Using External InterruptsThe MCU has

MC68332TUT/D MOTOROLA232.10.3 Interrupt VectorsVectors are 32-bit addresses that point to the interrupt service routines (and other exception handler

MOTOROLA MC68332TUT/D242.10.4.2 AutovectorsAutovectors can only be used with external interrupt service requests. When an external device cannot sup-

MC68332TUT/D MOTOROLA25It is very important to make certain that the IRQ7 signal be de-asserted before the level seven interrupt ser-vice routine end

MOTOROLA MC68332TUT/D263 ESTABLISHING COMMUNICATION3.1 Communicating with the Target BoardAfter a target board has been built, it is generally necess

MC68332TUT/D MOTOROLA27Only ten pins on the board, a special cable, and software are needed to debug. The M68ICD32 cable hasa 10-pin female connector

MOTOROLA MC68332TUT/D28The debugger should now work reliably. That is, programs can be downloaded into the RAM and executed.Alternatively, write the

MC68332TUT/D MOTOROLA29Press the page up key on the PC keyboard. A small window will open and ask for the character protocol.Select ASCII. Then, when

MC68332TUT/D MOTOROLA3 2 DESIGNING THE HARDWARE 2.1 Using Data Bus Pins to Configure the MCU The logic level of the data bus pins during reset deter

MOTOROLA MC68332TUT/D30Figure 19 8-Pin BDM Connector3.2.2 The M68EVS332The M68332 EVS is exactly the same as the M68EVK332, but has an additional dau

MC68332TUT/D MOTOROLA314 SYSTEM INITIALIZATION4.1 Configuring the Central Processing UnitInitial stack pointer and program counter values are fetched

MOTOROLA MC68332TUT/D324.1.3.1 Initializing the Reset VectorImmediately after the release of RESET, an internal state machine fetches the word values

MC68332TUT/D MOTOROLA33org $0008 ;put the following code in memory after the reset vector.DW $0000 ;The address of label INT is stored at location $0

MOTOROLA MC68332TUT/D342. If using the software watchdog, periodic interrupt timer, or the bus monitor, select action taken whenFREEZE is asserted. T

MC68332TUT/D MOTOROLA354.2.5 Periodic Interrupt Control Register (PICR)1. Determine the appropriate PIT vector number and interrupt priority.2. Write

MOTOROLA MC68332TUT/D36states. If a chip-select circuit is used to provide an autovector, fast termination is automaticallyselected, and the DSACK fi

MC68332TUT/D MOTOROLA37 MOVE.B #$7F,(SYNCR).L ;set system clock to 16.78 MHz CLR.B (SYPCR).L ;disable sof

MOTOROLA MC68332TUT/D384.4 Configuring the Queued Serial ModuleThe queued serial module (QSM) is divided into two submodules: the serial communicatio

MC68332TUT/D MOTOROLA394.4.2 Configuring the QSPIThe QSPI uses a synchronous serial bus to communicate with external peripherals and other MCUs. TheQ

MOTOROLA MC68332TUT/D474HC244s are enabled. Otherwise, if an external RESET signal was applied during a write to external mem-ory and was not condit

MOTOROLA MC68332TUT/D40 ;state of SCK as low, capture data on the ;leading edge o

MC68332TUT/D MOTOROLA414.5 Configuring the Time Processor UnitThe time processor unit (TPU) is an intelligent, semi-autonomous timer that has16 indep

MOTOROLA MC68332TUT/D424.5.1.2 Channel Function Select RegistersChannel function select registers (CFSR[1:3]) contain the function numbers assigned t

MC68332TUT/D MOTOROLA434.5.2 Parameter RAM RegistersEach channel has a dedicated set of word-long registers (called parameters) in the parameter RAM.

MOTOROLA MC68332TUT/D444 ∗ $84 + $00 = $210 Thus, the starting address of the interrupt routine must be stored in location $210.2. Store an interrupt

MC68332TUT/D MOTOROLA45*** Interrupt Initialization on Channel 4 *** MOVE.W #$0680,(TICR).l ;Interrupt level = 6, base vector =

MOTOROLA MC68332TUT/D465 TROUBLESHOOTINGBecause of the complexity of the MCU, there are a considerable number of potential ‘fatal flaws’ that cancaus

MC68332TUT/D MOTOROLA472. If the code does disable the watchdog, but the device is still resetting every 16 ms, then the code isprobably not being ex

MOTOROLA MC68332TUT/D48rupt lines (by writing to the PFPAR register). This problem is likely to be intermittent, as it would onlyoccur if an IRQ7 int

MC68332TUT/D MOTOROLA49A. The CPU recognizes the occurrence of a valid interrupt request and begins the IACK cycle. If noneof the modules enter arbit

MC68332TUT/D MOTOROLA5Using 8-bit memory simplifies the design and reduces cost, but with a significant performance penalty. Thispenalty is not fixe

MOTOROLA MC68332TUT/D50B. Compare the base address register values to see if any overlap. In addition to checking the actualvalues in the registers,

MC68332TUT/D MOTOROLA516 SOURCES OF INFORMATION6.1 Technical LiteratureAll Motorola literature can be ordered by mail from Motorola Literature Distri

MOTOROLA MC68332TUT/D52TPUPN13/DStepper Motor TPU Function (SM)TPUPN14/DPosition Synchronized Pulse Generator TPU Function (PSP)TPUPN15A/DPeriod Meas

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Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee re

MOTOROLA MC68332TUT/D6Remember that the level 7 interrupt is non-maskable — when configured as an interrupt line, IRQ7 isalways enabled. The only wa

MC68332TUT/D MOTOROLA7 2.5 Clock Circuitry The designer must decide whether to use the internal frequency synthesizer circuit or an external clock t

MOTOROLA MC68332TUT/D8 NOTE Some older versions of the MC68332 require different components. These masksets are 1C17P, 1C32J, OC53T, and 1C53T. See

MC68332TUT/D MOTOROLA9greater attenuation at the first harmonic. When figuring the reactance of the entire circuit, it is most importantto use the t