Motorola M68CPU32BUG Manuel d'utilisateur Page 15

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MC68332TUT/D MOTOROLA
15
Figure 10 Using LVI Devices with Multiple Power Supplies
2.8 Designing for Electromagnetic Compatibility
Because of the fast clock speed and relatively short rise and fall times of MCU signals, the designer must
consider electromagnetic compatibility (EMC) issues. All high-speed digital devices radiate noise, and if
FCC compliance is required, the designer must do everything possible to limit emissions from the MCU. Use
of a four-layer board is probably the best single option the designer has. Although a two-layer board will
work, a multilayer PCB is much more effective at both protecting the MCU from emissions, and reducing
emissions from the MCU. EMC compatibility is a complex topic, and this tutorial can present only a brief
overview of EMC design techniques.
2.8.1 Reducing Power Supply Noise
The MCU is very susceptible to noise created by large or rapid fluctuations in current through a particular
power supply pin. The power supply pins are divided up into V
DDE
/V
SSE
and V
DDI
/V
SSI
. The V
DDE
/V
SSE
pins
power the external drivers and pins, while the V
DDI
/V
SSI
pins power the internal peripherals and core of the
MCU. It is very important to keep the V
DDI
/V
SSI
pins free of noise as the CPU is generally more sensitive to
power supply noise than the port drivers. When designing a multilayer board, simply route the power and
ground pins directly to the power and ground planes; when designing a two-layer board, however, it is best
to isolate the power bus that serves the core of the chip from the power bus that serves the port drivers.
Figure 11 shows groups of pins that are powered by the same supply pins. Although only the 132- pin plas-
tic surface mount package is shown, the groups for the144-pin package are the same. In each group, the
V
DDE
and V
SSE
pins that power a particular group are shown in bold face type. The V
DDI
and V
SSI
pins are
labeled as such. EXTAL, XTAL, and XFC are powered only by V
DDSYN
.
When control of noise on the power buses is important, it is possible to isolate sections of the chip that are
particularly noisy. The data and address buses are particularly noisy because they continually change state,
and the same can be true of serial ports and timer pins. The amount of noise generated by a particular pin
is dependent upon the load being driven and the switching frequency. A designer who knows which power
and ground connections serve particular pins can shield other signal conductors from these noisy lines.
332TUT DUAL RESET CONN
POWER SUPPLY
POWER SUPPLY
LOW
VOLTAGE
INHIBIT
DEVICE A
DEVICE B
LOW
VOLTAGE
INHIBIT
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