Motorola M68CPU32BUG Manuel d'utilisateur télécharger pdf (Page 46)

MOTOROLA MC68332TUT/D

5 TROUBLESHOOTING

Because of the complexity of the MCU, there are a considerable number of potential ‘fatal flaws’ that can

cause a prototype application to either not operate from power up, or to fail soon after. This section covers

common problems, causes, and fixes.This is not an exhaustive discussion, but is intended to be used as a

check list of the main problem areas that can cause an application to fail.

5.1 Critical Signals to Check

• RESET should stay low for at least 512 clocks during a power-on reset. If using the internal PLL,

RESET will remain low for a little longer because the VCO must lock first. RESET should then go high

and remain high.

• CLKOUT should be at the system clock frequency. If MODLCK is held high at the release of reset,

CLKOUT should be 512 times the frequency going into EXTAL (8.389 MHz for a 32.768 kHz crystal).

Make sure that the frequency is exact, as a measurable error may indicate limp mode and oscillator

faults. If MODCLK is held low at the release of reset, the frequency on CLKOUT should be the fre-

quency going into EXTAL.

• Immediately after reset, CSBOOT

should pulse low five times for a 16-bit port and nine times for an

8-bit port.

• FREEZE should be low and HALT should be high. Otherwise, the MCU is halted, or is in BDM.

• BR and BGACK should be high. Otherwise, the external bus is granted away.

• Make sure that the data bus pins are configured correctly during reset.

• Make sure that IRQ7 is high during reset.

5.2 Common Problems and Solutions

5.2.1 Problem: Device Stays in Reset

1. There is no pull-up resistor on RESET. RESET needs an 820 Ω resistor to 5 volts. See 2.1 Using

Data Bus Pins to Configure the MCU and 2.3 Pins that Need Pull-Up Resistors.

2. A capacitor on RESET can also prevent the device from coming out of reset. Do not put any capac-

itors on RESET. See Sections 2.1 and 2.3.

3. MODCLK is pulled high at the release of RESET, and the VCO is not locking. Check the components

in the crystal circuit to ensure that they are correct. Check the layout to ensure that the board is clean

and that there are no noisy signals nearby to affect operation of the oscillator, and make sure that

power is applied to V

DDSYN

. Also, make sure that the crystal frequency is within specifications. If all

else fails, change crystals. See 2.5 Clock Circuitry.

4. MODCLK is pulled low at the release of RESET

, and there is no external clock signal. Make sure that

there is a signal going into EXTAL. See 2.5 Clock Circuitry.

5.2.2 Problem: Device Resets Every 16 ms

1. The software watchdog is enabled but is not being serviced by the program. When the watchdog is

enabled, the program must write a sequence to the software service register to prevent the watchdog

from timing out and resetting the MCU. The software watchdog is enabled out of reset, and the pro-

gram must disable it by clearing the SWE bit in the SYPCR register. Note that this is a write-once only

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Motorola M68CPU32BUG Manuel d'utilisateur Page 46