Motorola M68CPU32BUG Manuel d'utilisateur Page 4

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TABLE OF CONTENTS
M68332BCC/D ii MOTOROLA
REV 1
CHAPTER 3 OPERATING INSTRUCTIONS (continued)
3.5 Assembling/Disassembling Procedure ............................................................................. 3-12
3.6 Downloading Procedures.................................................................................................. 3-16
3.6.1 Apple Macintosh (with MacTerminal) to BCC...................................................... 3-17
3.6.2 Apple Macintosh (with White Knight) to BCC...................................................... 3-19
3.6.3 IBM-PC (with KERMIT) to BCC.......................................................................... 3-20
3.6.4 IBM-PC (with PROCOMM) to BCC..................................................................... 3-22
CHAPTER 4 FUNCTIONAL DESCRIPTION
4.1 Introduction......................................................................................................................... 4-1
4.2 BCC Description................................................................................................................. 4-1
4.2.1 MCU......................................................................................................................... 4-2
4.2.1.1 32-Bit Central Processor Unit ......................................................................... 4-3
4.2.1.2 Time Processor Unit........................................................................................ 4-3
4.2.1.3 Queued Serial Module..................................................................................... 4-3
4.2.1.4 Random Access Memory ................................................................................ 4-4
4.2.1.5 External Bus Interface..................................................................................... 4-4
4.2.1.6 Chip Selects..................................................................................................... 4-4
4.2.1.7 System Clock................................................................................................... 4-4
4.2.1.8 Test Module..................................................................................................... 4-5
4.2.2 User Memory............................................................................................................ 4-5
4.2.3 Terminal and Host Computer I/O Port..................................................................... 4-5
4.2.4 Background Mode Interface Port............................................................................. 4-5
CHAPTER 5 SUPPORT INFORMATION
5.1 Introduction......................................................................................................................... 5-1
5.2 Connector Signal Descriptions........................................................................................... 5-1
APPENDIX A S-RECORD INFORMATION
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