Motorola M68CPU32BUG Manuel d'utilisateur Page 156

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DIAGNOSTIC FIRMWARE GUIDE
M68CPU32BUG/D REV 1 6-12
The following describes the memory error display format for memory tests E through J. The error
reporting code is designed to conform to two rules:
1. The first time an error occurs, headings are printed out prior to the printing of the
values.
2. Upon 20 memory errors, the printing of error messages ceases for the remainder of the
test.
The memory error display format is:
FC TEST ADDR 10987654321098765432109876543210 EXPECTED READ
5 00010000 -----------------------X-------- 00000100 00000000
5 00010004 -------------------X-------X---- FFFFEFFF FFFFFFEF
Each line displayed consists of five items: function code, test address, graphic bit report,
expected data, and read data. The test address, expected data, and read data are displayed in
hexadecimal. The graphic bit report shows a letter X at each errant bit position and a dash (-) at
each good bit position.
The heading used for the graphic bit report is intended to make the bit position easy to determine.
Each numeral in the heading is the one’s digit of the bit position. For example, the leftmost bad
bit at test address $10004 has the numeral 2 over it. Because this is the second 2 from the right,
the bit position is read 12 in decimal (base 10).
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