Motorola M68CPU32BUG Manuel d'utilisateur Page 1

TABLE OF CONTENTSM68CPU32BUG/D REV 1 iiCHAPTER 3 DEBUG MONITOR COMMANDS (continued)3.8 Data Conversion (DC)...

DEBUG MONITOR DESCRIPTIONM68CPU32BUG/D REV 1 2-2The commands use a modified Backus-Naur syntax. The meta-symbols are:The angular brackets enclose a s

DEBUG MONITOR DESCRIPTIONM68CPU32BUG/D REV 1 2-82.5.1 CPU32Bug Vector Table and WorkspaceCPU32Bug requires 12k bytes of RAM to operate. On power-up o

DEBUG MONITOR DESCRIPTIONM68CPU32BUG/D REV 1 2-6EXAMPLE A portion of the listing file of a re-locatable module assembled with theMC68300 Family DOS r

DEBUG MONITOR DESCRIPTIONM68CPU32BUG/D REV 1 2-12Before the normal register display information is printed, the exception type information isdisplaye

DEBUG MONITOR DESCRIPTIONM68CPU32BUG/D REV 1 2-102.5.2.2 Creating Vector TablesA user program may create a separate vector table to store its excepti

DEBUG MONITOR COMMANDSM68CPU32BUG/D REV 1 3-2Table 3-1. Debug Monitor Commands (continued)CommandMnemonic Title ParagraphOF Offset Registers Display/

DEBUG MONITOR DESCRIPTIONM68CPU32BUG/D REV 1 2-14DEBUG MONITOR COMMANDSM68CPU32BUG/D REV 1 3-1CHAPTER 3DEBUG MONITOR COMMANDS3.1 INTRODUCTIONThis c

DEBUG MONITOR COMMANDSM68CPU32BUG/D REV 1 3-6BF Block of Memory Fill BFCPU32Bug>BF 4000:10 4E71 ;B<CR>Effective address: 00004000Effective c

DEBUG MONITOR COMMANDSM68CPU32BUG/D REV 1 3-4BC Block of Memory Compare BCCPU32Bug>BC 4000:20 4100;B<CR>Effective address: 00004000Effective

DEBUG MONITOR COMMANDSM68CPU32BUG/D REV 1 3-10BS Block of Memory Search BS3.6 BLOCK OF MEMORY SEARCHBS <range><del><text> [;B|W|L]

Motorola reserves the right to make changes without further notice to any products herein toimprove reliability, function or design. Motorola does not

DEBUG MONITOR COMMANDSM68CPU32BUG/D REV 1 3-8BM Block of Memory Move BMNow suppose the user would like to insert an NOP between the ADD.L instruction

DEBUG MONITOR COMMANDSM68CPU32BUG/D REV 1 3-14BV Block of Memory Verify BVEXAMPLES Assume memory from $6000 to $602F is as indicated.CPU32Bug>MD 6

DEBUG MONITOR COMMANDSM68CPU32BUG/D REV 1 3-12BS Block of Memory Search BSCPU32Bug>BS 3000:18,2F2F<CR>Effective address: 00003000Mode 2, usi

DEBUG MONITOR COMMANDSM68CPU32BUG/D REV 1 3-18DU Dump S-Records DUEnter ALT-F1 again to close the log file TEST.MX. The log file contains the extra l

DEBUG MONITOR COMMANDSM68CPU32BUG/D REV 1 3-16DU Dump S-Records DU3.9 DUMP S-RECORDSDU [<port><del>]<range><del>[<text>

DEBUG MONITOR COMMANDSM68CPU32BUG/D REV 1 3-22GN Go To Next Instruction GNUse the GN command to trace through the subroutine call and display the res

DEBUG MONITOR COMMANDSM68CPU32BUG/D REV 1 3-20GD Go Direct (Ignore Breakpoints) GDTo exit target code, press ABORT pushbutton.Exception: AbortPC =000

DEBUG MONITOR COMMANDSM68CPU32BUG/D REV 1 3-26GT Go To Temporary Breakpoint GT3.13 GO TO TEMPORARY BREAKPOINTGT <addr>[:<count>]Use the

DEBUG MONITOR COMMANDSM68CPU32BUG/D REV 1 3-24GO Go Execute User Program GOInitialize D0, set breakpoints, and start target program:D0 =00000000 ?

DEBUG MONITOR COMMANDSM68CPU32BUG/D REV 1 3-30HE Help HENOMAL Disable Macro Expansion ListingMD Memory DisplayMM Memory ModifyM "Alias" for

TABLE OF CONTENTSM68CPU32BUG/D REV 1 viLIST OF FIGURESFIGURES PAGE1-1. CPU32Bug Operation Mode Flow Diagram ...

DEBUG MONITOR COMMANDSM68CPU32BUG/D REV 1 3-28HE Help HE3.14 HELPHE [<command>]HE is the CPU32Bug help facility. HE <CR> displays all av

DEBUG MONITOR COMMANDSM68CPU32BUG/D REV 1 3-34MA Macro Define/Display MANOMAMacro Delete NOMA3.16 MACRO DEFINE/DISPLAY/DELETEMA [<name>]NOMA [

DEBUG MONITOR COMMANDSM68CPU32BUG/D REV 1 3-32LO Load S-Records From Host LOOther options:-C Ignore checksum. A checksum for the data contained withi

DEBUG MONITOR COMMANDSM68CPU32BUG/D REV 1 3-38MAE Macro Edit MAEEXAMPLESCPU32Bug>MA<CR> List definitions of macro ABC.MACRO ABC010 MD 300002

DEBUG MONITOR COMMANDSM68CPU32BUG/D REV 1 3-36MA Macro Define/Display MANOMAMacro Delete NOMACPU32Bug>MA ASM<CR> Define macro ASM.M=MM \0;DI

DEBUG MONITOR COMMANDSM68CPU32BUG/D REV 1 3-42MM Memory Modify MM3.20 MEMORY MODIFYMM <addr>[;[[B|W|L][A][N]]|[DI]]Use the MM command (alias M

DEBUG MONITOR COMMANDSM68CPU32BUG/D REV 1 3-40MD Memory Display MD3.19 MEMORY DISPLAYMD[S] <addr>[:<count>|<addr>][; [B|W|L|DI]]Us

DEBUG MONITOR COMMANDSM68CPU32BUG/D REV 1 3-46OF Offset Registers Display/Modify OFOffset register rules:• At power-up and cold-start reset, R7 is t

DEBUG MONITOR COMMANDSM68CPU32BUG/D REV 1 3-44MS Memory Set MS3.21 MEMORY SETMS <addr>{hexadecimal number}/{’string’}Use the MS command to wri

DEBUG MONITOR COMMANDSM68CPU32BUG/D REV 1 3-50PF Port Format PF( the next response demonstrates reversing the prompting order )XON/XOFF protocol [Y,N

TABLE OF CONTENTSM68CPU32BUG/D REV 1 ivCHAPTER 6 DIAGNOSTIC FIRMWARE GUIDE6.1 Introduction...

DEBUG MONITOR COMMANDSM68CPU32BUG/D REV 1 3-48PA Printer Attached PANOPAPrinter Detached NOPA3.23 PRINTER ATTACH/DETACHPA [<port>]NOPA [<po

DEBUG MONITOR COMMANDSM68CPU32BUG/D REV 1 3-54RD Register Display RDEXAMPLESCPU32Bug>rd<CR>PC =00003000 SR =2700=TR:OFF_S_7_... VBR =00000

DEBUG MONITOR COMMANDSM68CPU32BUG/D REV 1 3-52RD Register Display RD3.25 REGISTER DISPLAYRD {[+|-|=][<dname>][/]}{[+|-|=][<reg1>[-<re

DEBUG MONITOR COMMANDSM68CPU32BUG/D REV 1 3-58RS Register Set RS3.28 REGISTER SETRS <reg>[<exp>][;A]Use the RS command to display or cha

DEBUG MONITOR COMMANDSM68CPU32BUG/D REV 1 3-56RESET Cold/Warm Reset RESET3.26 COLD/WARM RESETRESETUse the RESET command to specify the reset operati

DEBUG MONITOR COMMANDSM68CPU32BUG/D REV 1 3-62T Trace TTrace the next two instructions:CPU32Bug>T 2<CR>PC =00007006 SR =2700=TR:OFF_S_7_...

DEBUG MONITOR COMMANDSM68CPU32BUG/D REV 1 3-60T Trace T3.30 TRACET [<count>]Use the T command to execute one instruction at a time and display

DEBUG MONITOR COMMANDSM68CPU32BUG/D REV 1 3-66TT Trace To Temporary Breakpoint TT3.33 TRACE TO TEMPORARY BREAKPOINTTT <addr>Use the TT command

DEBUG MONITOR COMMANDSM68CPU32BUG/D REV 1 3-64TC Trace On Change Of Control Flow TCTrace on change of flow:CPU32Bug>TC<CR>00007008 66FA

DEBUG MONITOR COMMANDSM68CPU32BUG/D REV 1 3-70VE Verify S-Records Against Memory VEThen converted into an S-Record file named TEST.MX as follows:S00A

GENERAL INFORMATIONM68CPU32BUG/D REV 1 1-4NOTEIn order for high-baud rate serial communication betweenCPU32Bug and the terminal to function properly,

DEBUG MONITOR COMMANDSM68CPU32BUG/D REV 1 3-68VE Verify S-Records Against Memory VE3.34 VERIFY S-RECORDS AGAINST MEMORYVE [<port>][<addr>

ASSEMBLER/DISASSEMBLERM68CPU32BUG/D 4-24.1.2 M68300 Family Resident Structured Assembler ComparisonThere are several major differences between the CPU

DEBUG MONITOR COMMANDSM68CPU32BUG/D REV 1 3-72ASSEMBLER/DISASSEMBLERM68CPU32BUG/D 4-1CHAPTER 4ASSEMBLER/DISASSEMBLER4.1 INTRODUCTIONIncluded as part

ASSEMBLER/DISASSEMBLERM68CPU32BUG/D 4-64.2.1.5 Character SetThe character set recognized by the CPU32Bug assembler is a subset of ASCII and listed bel

ASSEMBLER/DISASSEMBLERM68CPU32BUG/D 4-44.2.1.2 Operand FieldIf present, the operand field follows the operation field and is separated from the operat

ASSEMBLER/DISASSEMBLERM68CPU32BUG/D 4-10EXAMPLES DESCRIPTION00010022 04D2 DC.W 1234 Decimal number00010024 AAFE DC.W &AAFE Hexadecimal number00010

ASSEMBLER/DISASSEMBLERM68CPU32BUG/D 4-8Allowed operators are:Addition +Subtraction -Multiply *Divide /Shift left <<Shift right >>Bitwise o

SYSTEM CALLSM68CPU32BUG/D REV 1 5-2It is necessary to create an equate file with the routine names equated to their respective codes, ordownload the

ASSEMBLER/DISASSEMBLERM68CPU32BUG/D 4-124.3.3 Entering Branch and Jump AddressesWhen entering a source line containing a branch instruction (BRA, BGT,

SYSTEM CALLSM68CPU32BUG/D REV 1 5-6.CHANGEV Parse Value, Assign to Variable .CHANGEVIf the above code was called with a syscall routine and BUFFER co

GENERAL INFORMATIONM68CPU32BUG/D REV 1 1-2POWER-UP/RESETWARM START?SET DEBUGGERDIRECTORYDISPLAY DEBUGGERNAME AND VERSIONDISPLAY WARMSTART MESSAGEYESD

SYSTEM CALLSM68CPU32BUG/D REV 1 5-4.BINDEC Calculate BCD Equivalent Specified Binary Number .BINDEC5.2.1 Calculate BCD Equivalent Specified Binary Nu

SYSTEM CALLSM68CPU32BUG/D REV 1 5-10.ERASLN Erase Line .ERASLN5.2.6 Erase LineSYSCALL .ERASLNTRAP CODE: $0027Use .ERASLN to erase the line at the pre

SYSTEM CALLSM68CPU32BUG/D REV 1 5-8.DELAY Timer Delay Function .DELAY5.2.4 Timer Delay FunctionSYSCALL .DELAYTRAP CODE: $0043The .DELAY function gene

SYSTEM CALLSM68CPU32BUG/D REV 1 5-14.MULU32 Unsigned 32 x 32 Bit Multiply .MULU325.2.10 Unsigned 32 x 32 Bit MultiplySYSCALL .MULU32TRAP CODE: $0069M

SYSTEM CALLSM68CPU32BUG/D REV 1 5-12.INLN Input Line Routine .INLN5.2.8 Input Line RoutineSYSCALL .INLNTRAP CODE: $0002Reads a line from the default

SYSTEM CALLSM68CPU32BUG/D REV 1 5-18.READLN Read Line to Fixed-Length Buffer .READLN5.2.14 Read Line to Fixed-Length BufferSYSCALL .READLNTRAP CODE:

SYSTEM CALLSM68CPU32BUG/D REV 1 5-16.OUTLN Output String Using Pointers .OUTLN.OUTSTR .OUTSTR5.2.12 Output String Using PointersSYSCALL .OUTLNTRAP CO

SYSTEM CALLSM68CPU32BUG/D REV 1 5-22.STRCMP Compare Two Strings .STRCMP5.2.18 Compare Two StringsSYSCALL .STRCMPTRAP CODE: $0068An equality compariso

SYSTEM CALLSM68CPU32BUG/D REV 1 5-20.RETURN Return to CPU32Bug .RETURN5.2.16 Return to CPU32BugSYSCALL .RETURNTRAP CODE: $0063.RETURN restores contro

SYSTEM CALLSM68CPU32BUG/D REV 1 5-26.TM_STR0 Start Timer at T=0 .TM_STR0MOVE.L #$00000002,-(A7)Reset the timer to zero and start it with the default

GENERAL INFORMATIONM68CPU32BUG/D REV 1 1-8GENERAL INFORMATIONM68CPU32BUG/D REV 1 1-51.5.3 BreakThe BREAK key on the terminal keyboard initiates a

SYSTEM CALLSM68CPU32BUG/D REV 1 5-24.TM_RD Read Timer .TM_RD5.2.20 Read TimerSYSCALL .TM_RDTRAP CODE: $0042Use this routine to read the timer value

SYSTEM CALLSM68CPU32BUG/D REV 1 5-30.WRITE Output String Using Character Count .WRITE.WRITELN .WRITELN . . . . . prints this message:MOTOROLA QUALITY

SYSTEM CALLSM68CPU32BUG/D REV 1 5-28.WRITD Output String with Data ..WRITD.WRITDLN .WRITDLNEXAMPLEThe following section of code ...ERRMESSG DC.B $1

DIAGNOSTIC FIRMWARE GUIDEM68CPU32BUG/D REV 1 6-46.2.13 Zero Pass Count (ZP)Executing this command resets the pass counter DP to zero. This is freque

DIAGNOSTIC FIRMWARE GUIDEM68CPU32BUG/D REV 1 6-2To execute a particular test, for example CPU, enter CPU X (X = the desired sub-command).This command

DIAGNOSTIC FIRMWARE GUIDEM68CPU32BUG/D REV 1 6-8CPU B Instruction Test CPU B6.4.2 Instruction TestCPU32Diag>CPU BCPU B tests various data movemen

DIAGNOSTIC FIRMWARE GUIDEM68CPU32BUG/D REV 1 6-6CPU CPU Tests For The MCU CPU6.4 CPU TESTS FOR THE MCUCPU tests are a series of diagnostics used to

DIAGNOSTIC FIRMWARE GUIDEM68CPU32BUG/D REV 1 6-12The following describes the memory error display format for memory tests E through J. The errorrepor

DIAGNOSTIC FIRMWARE GUIDEM68CPU32BUG/D REV 1 6-10CPU D Exception Processing Test CPU D6.4.4 Exception Processing TestCPU32Diag>CPU DCPU D tests m

DIAGNOSTIC FIRMWARE GUIDEM68CPU32BUG/D REV 1 6-16MT D Set Bus Data Width MT D6.5.4 Set Bus Data WidthCPU32Diag>MT D [new value: 0 for 16, 1 for 3

GENERAL INFORMATIONM68CPU32BUG/D REV 1 1-6INTERNAL RAM(1) XXX7FF(2) XXX000MCU INTERNAL MODULES SYSTEM RAM BCC: U2 & U3TARGET RAM BCC: U2 &

DIAGNOSTIC FIRMWARE GUIDEM68CPU32BUG/D REV 1 6-14MT B Set Start Address MT B6.5.2 Set Start AddressCPU32Diag>MT B [new value]MT B allows the user

DIAGNOSTIC FIRMWARE GUIDEM68CPU32BUG/D REV 1 6-20MT H Random Byte Test MT H6.5.8 Random Byte TestCPU32Diag>MT HMT H performs a random byte test f

DIAGNOSTIC FIRMWARE GUIDEM68CPU32BUG/D REV 1 6-18MT F Walk a Bit Test MT F6.5.6 Walk a Bit TestCPU32Diag>MT FMT F performs a walking bit test fro

DIAGNOSTIC FIRMWARE GUIDEM68CPU32BUG/D REV 1 6-24DIAGNOSTIC FIRMWARE GUIDEM68CPU32BUG/D REV 1 6-21MT I Program Test MT I6.5.9 Program TestCPU32Diag

DIAGNOSTIC FIRMWARE GUIDEM68CPU32BUG/D REV 1 6-22MT J Test and Set Test MT J6.5.10 Test and Set TestCPU32Diag>MT JMT J performs a Test and Set (T

S-RECORD INFORMATIONM68CPU32BUG REV 1 A-4The next 16 character pairs of the first S1 record are the ASCII bytes of the actual programcode/data. In th

S-RECORD INFORMATIONM68CPU32BUG REV 1 A-2Each record may be terminated with a CR/LF/NULL. Additionally, an S-record may have aninitial field to accom

USER CUSTOMIZATIONM68CPU32BUG REV 1 C-2C.2 CPU32BUG CUSTOMIZATIONThe general procedure for customizing CPU32Bug is as follows:1. Copy the parameter a

SELF-TEST ERROR MESSAGESM68CPU32BUG REV 1 B-2Table B-1. Self-Test Error Messages (continued)Test Type and Error Message Failure DescriptionROM Test:E

USER CUSTOMIZATIONM68CPU32BUG REV 1 C-6Table C-1. CPU32Bug Customization Area (continued)Offset Default Value Mnemonic DescriptionCommon Chip Select T

DEBUG MONITOR DESCRIPTIONM68CPU32BUG/D REV 1 2-4EXAMPLES Valid expressions.Expression Result (in hex)FF0011 FF001145+99 DE&45+&99 90@35+@67+@

USER CUSTOMIZATIONM68CPU32BUG REV 1 C-49. Power up the newly programmed BCC and note the checksum value indicated.Repeat steps 1 through 8 above, to

USER CUSTOMIZATIONM68CPU32BUG REV 1 C-10Table C-1. CPU32Bug Customization Area (continued)Offset Default Value Mnemonic DescriptionPower On Branch Vec

USER CUSTOMIZATIONM68CPU32BUG REV 1 C-8Table C-1. CPU32Bug Customization Area (continued)Offset Default Value Mnemonic DescriptionROM AUTO BOOT VECTOR

USER CUSTOMIZATIONM68CPU32BUG REV 1 C-14C.4 COMMUNICATION FORMATSNot all combinations of data bits, parity, and stop bits are valid for the MCU SCI. T

USER CUSTOMIZATIONM68CPU32BUG REV 1 C-12Table C-1. CPU32Bug Customization Area (continued)Initialization Tables (continued)This entry format aligns wi

USER CUSTOMIZATIONM68CPU32BUG REV 1 C-18C.8 PLATFORM BOARD (PFB) REV. C COMPATIBILITYPFB Rev. C boards have jumpers (J8 - J13) which when installed, m

USER CUSTOMIZATIONM68CPU32BUG REV 1 C-16C.6 BCC REV. B CHIP SELECTION SUMMARYTable C-4 covers Rev. B of the M68332BCC Business Card Computer and M6833

USER CUSTOMIZATIONM68CPU32BUG REV 1 C-22Q: How can I get CPU32Bug to automatically execute my user program upon power up?A: Use the ROM Auto Boot Vect

USER CUSTOMIZATIONM68CPU32BUG REV 1 C-20Q: How can I change the Periodic Interrupt Timer (PIT) "tick" time for the SYSCALL timingfunctions?A