Motorola M68CPU32BUG Manuel d'utilisateur Page 20

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DEBUG MONITOR COMMANDS
M68CPU32BUG/D REV 1 3-8
BM Block of Memory Move BM
Now suppose the user would like to insert an NOP between the ADD.L instruction and the
ASR.L instruction. Block move the object code down two bytes to make room for the NOP.
CPU32Bug>BM 6002 600B 6004<CR>
Effective address: 00006002
Effective address: 0000600B
Effective address: 00006004
CPU32Bug>MD 6000 600C;DI<CR>
00006000 D480 ADD.L D0,D2
00006002 E2A2 ASR.L D1,D2
00006004 E2A2 ASR.L D1,D2
00006006 2602 MOVE.L D2,D3
00006008 4E4F SYSCALL OUTSTR
0000600C 4E71 NOP
Now the user need simply enter the NOP at address 6002.
CPU32Bug>MM 6002;DI <CR>
00006002 E2A2 ASR.L D1,D2 ? NOP<CR>
00006002 4E71 NOP
00006004 E2A2 ASR.L D1,D2 ? .<CR>
CPU32Bug>
CPU32Bug>MD 6000 600C;DI<CR>
00006000 D480 ADD.L D0,D2
00006002 4E71 NOP
00006004 E2A2 ASR.L D1,D2
00006006 2602 MOVE.L D2,D3
00006008 4E4F TRAP #15
0000600C 4E71 NOP
CPU32Bug>
DEBUG MONITOR COMMANDS
M68CPU32BUG/D REV 1 3-9
BR Breakpoint Insert BR
NOBR
Breakpoint Delete NOBR
3.5 BREAKPOINT INSERT/DELETE
BR {<addr>[:<count> ]}
NOBR [<addr>]
The BR command allows the user to set a target code instruction address as a breakpoint address
for debugging purposes. Enter only the BR command to display the current breakpoints in the
breakpoint table, or enter {<addr> [:<count> ]} one or more times to set multiple breakpoints. If
during target code execution a breakpoint with 0 count is found, the target code state is saved in
the target registers and control returned to CPU32Bug. This allows the user to see the actual state
of the processor at selected instructions in the code.
Breakpoints are normally only used in RAM, but they may be used in ROM when operating
under the TRACE commands (see T, TC, and TT commands for details).
As many as eight breakpoints can be defined. Breakpoints are kept in a table which is displayed
each time either BR or NOBR is used. If an address is specified with the BR command, that
address is added to the breakpoint table. The count field specifies how many times the instruction
at the breakpoint address is fetched before a breakpoint is taken. The count field defaults to
hexidecimal input, unless a numeric identifier prefix is used. The count, if greater than zero, is
decremented with each fetch. Every time a breakpoint with zero count is found, a breakpoint
handler routine prints the CPU state on the screen and control is returned to CPU32Bug. The
maximum <count> is a 32-bit value ($FFFFFFFF = 4,294,967,295).
NOBR is used to delete breakpoints from the breakpoint table. To remove a specific address
from the breakpoint table, enter NOBR followed by the address. If NOBR <CR> is entered then
all entries are deleted from the breakpoint table and the empty table is displayed.
EXAMPLE
CPU32Bug>BR 4000,4200 4700:&12 <CR> Set multiple breakpoints
BREAKPOINTS
00004000 00004200
00004700:C
CPU32Bug>NOBR 4200 <CR>
Delete one breakpoint
BREAKPOINTS
00004000 00004700:C
CPU32Bug>NOBR <CR>
Delete all breakpoints
BREAKPOINTS
CPU32Bug>
Fr
eescale S
emiconduct
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, I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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