Motorola M68CPU32BUG Manuel d'utilisateur Page 39

  • Télécharger
  • Ajouter à mon manuel
  • Imprimer
  • Page
    / 98
  • Table des matières
  • MARQUE LIVRES
  • Noté. / 5. Basé sur avis des utilisateurs
Vue de la page 38
DEBUG MONITOR COMMANDS
M68CPU32BUG/D REV 1 3-50
PF Port Format PF
( the next response demonstrates reversing the prompting order )
XON/XOFF protocol [Y,N] = Y? ^ <CR> Backup
Stop Bits [1,2] = 2? .<CR> Value acceptable, exit interactive
mode.
OK to proceed (y/n)? Y Note: Carriage return not required.
CPU32Bug>
3.24.3 Port Format Parameters
The port format parameters are:
Port base address – When assigning a port, there is a set base address option. This
allows the user to adjust the base address for different hardware configurations.
Entering no value selects the default address.
Baud rate – Select the baud rate: 110, 300, 600, 1200, 2400, 4800, 9600, 19200.
Parity type – Set parity: even (E), odd (0), or disabled (N).
Character width – Select 5-, 6-, 7-, or 8-bit characters.
Number of stop bits – Only 1 and 2 stop bits are supported.
Automatic software handshake – Current drivers have the capability of responding to
XON/XOFF characters sent to the debugger ports. Receiving a XOFF causes a driver
to cease transmission until a XON character is received. None of the current drivers
utilize FIFO buffering, therefore, none initiate an XOFF condition.
Software handshake character values – The values used by a port for XON and XOFF
may be defined as any 8-bit value. ASCII control characters or hexadecimal values are
accepted.
NOTE
Not all combinations of parity type, character width, and stop bits
are supported for the BCC "SCI" port, 00. See Appendix C for
details.
DEBUG MONITOR COMMANDS
M68CPU32BUG/D REV 1 3-47
OF Offset Registers Display/Modify OF
Set R0 as the automatic register.
CPU32Bug>OF R0;A<CR>
R0*=00005000 000050FF? .<CR>
Display location 0 relative to the default offset register, (R0), i.e. absolute location $5000.
CPU32Bug>M 0;DI<CR>
00000+R0 41F95445 5354 LEA.L ($54455354).L,A0 .<CR>
CPU32Bug>
Display absolute location 0, override the automatic offset.
CPU32Bug>M 0+R7;DI <CR>
00000000 FFF8 DC.W $FFF8 .<CR>
CPU32Bug>
Fr
eescale S
emiconduct
or
, I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
nc...
Vue de la page 38
1 2 ... 34 35 36 37 38 39 40 41 42 43 44 ... 97 98

Commentaires sur ces manuels

Pas de commentaire