Motorola 68HC12B32 Manuel d'utilisateur

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UF 68HC12 Development Kit Manual
October 2006 (Version 4.01) Page 1/24
EEL 4744: Microprocessor Applications
Note that the bubbles on the header pins on the schematics do not represent activation-level
information. Headers are passive devices.
Contents
1.0 Introduction................................................................................................................ 1
2.0 Installation & Quick Testing....................................................................................... 1
3.0 Header Definitions..................................................................................................... 1
4.0 Jumper Definitions..................................................................................................... 3
5.0 Memory Map & Interrupt Vectors............................................................................... 5
6.0 CPLD/Header Cross Reference Table ...................................................................... 7
7.0 Schematics................................................................................................................ 8
A.1 68HC12B32 Pin-out ................................................................................................ 19
A.2 Altera 7064 – EPROM/EEPROM Decode Equations & CPLD Signal Pin-outs ....... 23
1.0 Introduction
The UF 68HC12 Development Kit integrates the 68HC12B32 with an EPROM and an Altera 7064
CPLD. The purpose of the EPROM is to allow expanded mode booting of the 6812 using the UF-6812
Monitor/Debugger, D-Bug4744 (similar to Motorola’s D-Bug12). I/O can be easily connected to the
processor via address decoding in the CPLD. These features, coupled with the fact that the 6812’s
address, data, control and port pins are broken out to 100 mil headers, provide a fast and easy platform
for prototyping of hardware with the 68HC12B32 Micro-controller.
2.0 Installation & Quick Testing
1. Connect a USB cable between the 6812 Development board and your PC.
2. Connect a 5V power supply to Header J11. Note: Pin1 is +5V and Pin3 is Ground. See Figure
1 for the location of Header J11. * Note: Alternatively, you may power your 6812HC12 board
using the power supplied from your computer via the USB cable. To enable this, short solder
across the jumper labeled RP. DO NOT CONNECT BOTH POWER SUPPLIES AT THE
SAME TIME!*
3. Open a terminal application on your PC. Set your terminal properties to:
Connect Using: Communication Port Assigned to USB Port (e.g. Com1)
Transfer Rate: 9600 bits per second
Data Bits: 8
Parity: None
Stop Bits: 1
Flow Control: None
4. Press the Reset Button on the Board.
5. You should now see the monitor menu show up in your terminal.
6. If you do not see this menu in your terminal application, check all of your board’s jumper
settings using the definitions in the next section.
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Résumé du contenu

Page 1 - 1.0 Introduction

UF 68HC12 Development Kit Manual October 2006 (Version 4.01) Page 1/24 EEL 4744: Microprocessor Applications Note that the bubbles on the head

Page 2 - 3.0 Header Definitions

UF 68HC12 Development Kit Manual October 2006 (Version 4.01) Page 10/24 EEL 4744: Microprocessor Applications Note that the bubbles on the hea

Page 3 - 4.0 Jumper Definitions

UF 68HC12 Development Kit Manual October 2006 (Version 4.01) Page 11/24 EEL 4744: Microprocessor Applications Note that the bubbles on the hea

Page 4

UF 68HC12 Development Kit Manual October 2006 (Version 4.01) Page 12/24 EEL 4744: Microprocessor Applications Note that the bubbles on the hea

Page 5

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Page 6

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Page 7

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Page 8 - J16 : CPLD IO Header Pin-out

UF 68HC12 Development Kit Manual October 2006 (Version 4.01) Page 16/24 EEL 4744: Microprocessor Applications Note that the bubbles on the hea

Page 9 - 7.0 Schematics

UF 68HC12 Development Kit Manual October 2006 (Version 4.01) Page 17/24 EEL 4744: Microprocessor Applications Note that the bubbles on the hea

Page 10

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Page 19

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Page 20 - U4 : 68HC12B32 Pin-out

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