Motorola M68HC11EVBU Manuel d'utilisateur

68HC11 Programmer’s ReferenceManualPhillip [email protected] 1999Version 1.7

2 SOFTWARE DEVELOPMENT CYCLE 62.4 CodingStart filling in the details by writing code for the algorithm(s) and program structure thatyou have designed.

2 SOFTWARE DEVELOPMENT CYCLE 7storage you chose and also to see any assembler errors5messages next to the offendingsource statements.The object file or

2 SOFTWARE DEVELOPMENT CYCLE 8external bus signals when the CPU is accessing its internal zero-page RAM but the dataused will be transferred to and fr

2 SOFTWARE DEVELOPMENT CYCLE 9$0000 Start of internal RAM (512 bytes) $0000 Start of page 0 user RAM$0032 End of page 0 user RAM$0033 Start of RAM use

3 OBJECT FILE DOWNLOADING 103 Object File DownloadingThere are a variety of ways that you can connect a 68HC11 board to a variety of hostcomputers — h

3 OBJECT FILE DOWNLOADING 113.2 System = HC11 board + PC/DOS + procommThe PC is connected to the HC11 board via a serial cable. Invoke the procomm com

3 OBJECT FILE DOWNLOADING 12set transmit echo onset transmit linefeed offset transmit fill \32set transmit pause 25set transmit prompt 0set transmit e

3 OBJECT FILE DOWNLOADING 13that 1 of the bits in external memory is always read as a 0 or 1 no matter what you store.Get a logic probe and verify tha

4 ASSEMBLER DIRECTIVES 144 Assembler directivesAssembler directives are statements in the assembly language source file that specify howyou want the da

4 ASSEMBLER DIRECTIVES 154.2.1 EQU — EQUATE SYMBOL TO A VALUELABEL EQU <expression> [;comment]The EQU directive assigns the value of the express

Credits• Engineer proofreading: Dr. Barbara La Scala;• Cross Assembler for 68HC11: Motorola;• University of Wollongong F1 system: Pete Dunster; and• M

4 ASSEMBLER DIRECTIVES 164.3.3 FCB — FORM CONSTANT BYTE[LABEL] FCB <expr>(,<expr>,...,<expr>) [;comment]The FCB directive may have o

4 ASSEMBLER DIRECTIVES 174.4 Addressing ModesThe assembler interprets the syntax of the operands to allow us to specify the addressingmode at assembly

4 ASSEMBLER DIRECTIVES 18which the assembler evaluates into 1 or 2 bytes of data that follow the op-code. (Whenthe instruction is executed later, the

4 ASSEMBLER DIRECTIVES 19REGBS EQU $1000 ; location of on-board peripheralsldx #REGBS ; load X with a base addressbclr %00000010 0,X ; clear bit 1 of

5 ASSEMBLER LISTING FILE FORMAT 205 Assembler listing file formatThe Assembler listing has the following format:LINE# ADDR OBJECT CODE BYTES [ # CYCLES

5 ASSEMBLER LISTING FILE FORMAT 210026 432d TMPX RMB 20027 432f TMPY RMB 20028 ENDProgram + Init Data = 27 bytesError count = 0MSG1 4321 *0023TMPX 432

A 68HC11 CPU REGISTERS 22A 68HC11 CPU RegistersFigure 1 shows the CPU registers that we are primarily concerned with when program-ming. At the commenc

B 68HC11 INSTRUCTION SET 23The condition code register CC holds the current CPU state. Some bits hold a summaryof recent data manipulation performed b

B 68HC11 INSTRUCTION SET 24MC68HC11A8 CPU, ADDRESSING MODES, AND INSTRUCTION SET MOTOROLATECHNICAL DATA 10-7BITA (opr) Bit(s) Test A with Memory A•M A

B 68HC11 INSTRUCTION SET 25MC68HC11A8 CPU, ADDRESSING MODES, AND INSTRUCTION SET MOTOROLATECHNICAL DATA 10-9LDS (opr) Load Stack Pointer M:M + 1 → SP

Contents1 Introduction 11.1 Tools . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21.2 Command Entry . . . . . . . . . .

B 68HC11 INSTRUCTION SET 26MC68HC11A8 CPU, ADDRESSING MODES, AND INSTRUCTION SET MOTOROLATECHNICAL DATA 10-11**Infinity or Until Reset Occurs***12 Cyc

C 68HC11 VECTORS 27C 68HC11 VectorsThe permanent vectors in ROM location $FFD6. . .$FFFD point to locations 3 bytes apartin RAM. After a reset, BUFFAL

C 68HC11 VECTORS 28C.1 Jump Vectors**************************************************************************** This file provides vector definitions

C 68HC11 VECTORS 29**************************************************************************** PART 1 --- vectors in RAM ****************************

C 68HC11 VECTORS 30* fff8 03 f7 VILLOP FDB JILLOP |* fffa 03 fa VCOP FDB JCOP |* fffc 03 fd VCLM FDB JCLM |* fffe dc 00 VRST FDB BUFFALO |* Observe th

C 68HC11 VECTORS 31JTIC3 EQU VOFF*10+VBASEUVTIC3 EQU VOFF*10+VBASE+1JTIC2 EQU VOFF*11+VBASEUVTIC2 EQU VOFF*11+VBASE+1JTIC1 EQU VOFF*12+VBASEUVTIC1 EQU

C 68HC11 VECTORS 32C.2 Buffalo Entry Points**************************************************************************** PART 2 --- entry points in ROM

C 68HC11 VECTORS 33.UPCASE EQU $FFA0 ; = JMP UPCASE; Convert any lower case alphabetic character in; register A to upper case..WCHEK EQU $FFA3 ; = JMP

C 68HC11 VECTORS 34; the indirect vector area in RAM. This routine or; a similar routine should be included in a user; program which is invoked by the

D MONITOR SYMBOL DEFINITIONS 35D Monitor Symbol DefinitionsFiles symbols.e9, symbols.f1w, and symbols.f1p contain definitions of important 68HC11IO regi

4.4.3 Immediate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 174.4.4 Register Indirect (with offset) . . . . . . . . . . . . . . . .

D MONITOR SYMBOL DEFINITIONS 36* A NOTE ON PORTS* If the 68HC11 is configured as a stand alone system (e.g. a Motorola EVBU* board where there is no e

D MONITOR SYMBOL DEFINITIONS 37* Serial peripheral interface.SPCR EQU REGBS+$28 SPI control registerSPSR EQU REGBS+$29 SPI status registerSPDR EQU REG

D MONITOR SYMBOL DEFINITIONS 38* General Purpose Chip Select Address RegisterCSGADR EQU REGBS+$5E bits[GA15 GA14 GA13 GA12 GA11 GA10 - -]** General Pu

E MAKEFILE EXAMPLE 39E Makefile ExampleThis Makefile can be used with the memory test program memtest available fromftp://mirriwinni.cse.rmit.edu.au/pub

F REAL–TIME INTERRUPT EXAMPLE 40F Real–Time Interrupt ExampleThe following example shows how to setup the real–time interrupt facility to generate reg

F REAL–TIME INTERRUPT EXAMPLE 41* point to a particular piece of *our* interrupt handler code. So the ** simplest thing to do was just to arrange for

F REAL–TIME INTERRUPT EXAMPLE 42* up as a robustness measure. However, this is how it would be done* if we were writing a real piece of RESET code.***

G MISCELLANEOUS INFORMATION 43G Miscellaneous InformationG.1 RESET Bootup Code in BUFFALOG.1.1 EVBU and BUFFALOFor EVBU boards, the RESET code in the

G MISCELLANEOUS INFORMATION 44G.5 Mode setting for expanded modeThe 68HC11 has two mode selection signals. The setting of MODA=1,MODB=1 results in the

H 68HC11 NET RESOURCES 45H 68HC11 Net ResourcesSome current sites that provide resources are:• http://mirriwinni.cse.rmit.edu.au/~f1documentation and

1 INTRODUCTION 11 IntroductionThere are a large number of 68HC11 devices and 68HC11 development systems available. Itis possible for this generous cho

I 68HC11 OVERVIEW 46I 68HC11 OverviewOSCILLATORPE0A15A14A13A12A11A10AD7AD6AD5AD4AD3AD2AD1AD0RWbarASRESETbarXIRQbarPOWERSELECTMODEPE7PE6PE5PE4PE3PE2PE1

1 INTRODUCTION 2• http://mirriwinni.cse.rmit.edu.au/~phillip/f1• http://mirriwinni.cse.rmit.edu.au/~f1• ftp://mirriwinni.cse.rmit.edu.au/pub/UoW1.1 To

1 INTRODUCTION 3• the ImageCraft C compiler (ICC), which runs under DOS and OS/2, provides a doc-umented near ANSI C compiler, assembler, linker, and

1 INTRODUCTION 41.4 Setting up your assembly language tools1.4.1 Cross assembler — DOSFor DOS systems, the cross assembler is available in executable

2 SOFTWARE DEVELOPMENT CYCLE 52 Software development cycle2.1 Understand the problemWhat is it you need to do? Identify the data inputs and data outpu