Motorola DragonBall MC9328MX1 Manuel d'utilisateur télécharger pdf

TN-29-10: DragonBall/MT29F2Gxx Interface

Overview

09005aef81b645b8 pdf / 09005aef81b64704 source Micron Technology, Inc., reserves the right to change products or specifications without notice.

tn2910_mx1.fm - Rev. B 5/07 EN

Products and specifications discussed herein are for evaluation and reference purposes only and are subject to change by

Micron without notice. Products are only warranted by Micron to meet Micron’s production data sheet specifications. All

information discussed herein is provided on an “as is” basis, without warranties of any kind.

Freescale™ DragonBall™ MX1 Adaptation

for NAND Flash Memory

MT29F2G08/MT29F2G16

Overview

NAND Flash devices have quickly become the preferred solution for high-density non-

volatile memory storage, particularly in mobile product applications where size and

power are important considerations.

While various processors may not include a NAND Flash controller, it is possible to

interface NAND Flash devices to almost any processor. This is the case with the

Freescale

™

DragonBall™ MC9328MX1 application processor (“MX1”). By utilizing low-

level software drivers and the MX1 address/data/control pins, the MX1 can communi-

cate with the NAND Flash device and use its full range of capabilities. This technical note

introduces hardware and software methods for implementing this approach and

assumes a general understanding of the Micron 2Gb NAND Flash device on the part of

the reader. Figure 1 on page 3 shows a typical hardware interface for connecting non-

native processors to NAND Flash. Implementation results described in this technical

note are derived from the setup and configuration shown in Figure 2 on page 4.

Detailed information on Micron NAND Flash devices can be found on the Micron Web

site at www.micron.com/products/nand. The methods discussed in this document

apply to the MX1 applications processor as well as to numerous other platforms.

It is important to note that this discussion of hardware and software to produce a viable

NAND Flash interface does not reflect the use of error correction code (ECC), block

management, or wear-leveling methods—all essential elements for a robust NAND

Flash implementation, which are discussed in TN-29-17 at www.micron.com/prod-

ucts/nand/technotes.

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TN-29-10: DragonBall/MT29F2Gxx InterfaceOverview09005aef81b645b8 pdf / 09005aef81b64704 source Micron Technology, Inc., reserves the right to change