Motorola MVME172 Manuel d'utilisateur Page 21
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Installation
1-5
1
400/500-Series Modules
As delivered, 172Bug is installed in and executes out of the lower
512KB of a 28F016SA Flash memory device. This leaves the
remainder of the Flash memory available for your use. 172Bug is
also installed in the single 27C040 PLCC EPROM in socket XU2. If
your application requires all of the Flash memory, you can access
172Bug in the EPROM. Refer to Installation below.
Installation
Set up and install the MVME172 module using the installation
procedures in your MVME172 installation manual. This section
includes additional information that affects the operation of the
172Bug diagnostics and debugger.
General Purpose Readable Header Jumper Settings
172Bug defines the four lower order bits (GPI3 to GPI0) on the
General Purpose Readable Header (J21 on the 200/300-Series
MVME172 or J28 on the 400/500-Series MVME172), as listed in
Table 1-2.
The jumpers can be read as a register (at $FFF4202D) on the
Memory Controller Chip (MC2 chip) ASIC. Jumper block J21 or J28
contains eight bits. The bit values are one when the jumper is off
and zero when the jumper is on. Refer also to the MVME172 VME
Embedded Controller Programmer's Reference Guide for more
information on the MC2 chip.
200/300-Series Modules
As received from the factory, the default setting for the General
Purpose Readable Header J21 on the 200/300-Series MVME172 is
with jumpers installed across all J21 pin pairs except pins 7 and 8
(GPI3). 172Bug operates out of EPROM. If you install a jumper on
- Diagnostics 1
- User's Manual 1
- Motorola, Inc 2
- Computer Group 2
- 2900 South Diablo Way 2
- Tempe, Arizona 85282 2
- Conventions 4
- Manual Terminology 5
- Notice of Copyright 6
- Safety Summary 7
- Safety Depends On You 7
- Contents 9
- List of Figures 14
- List of Tables 15
- 1General Information 17
- Memory Requirements 18
- 172Bug Implementation 20
- Installation 21
- System Console 24
- Start-up 25
- General Information 26
- 2Using the Diagnostics 29
- Diagnostic Commands 30
- CEM - Clear Error Messages 31
- DE - Display Error Counters 32
- DEM - Display Error Messages 32
- DP - Display Pass Count 32
- HE - Help 32
- HEX - Interactive Help 34
- MASK - Self Test Mask 34
- SD - Switch Directories 34
- ST - Self Test 35
- ZE - Clear Error Counters 35
- ZP - Zero Pass Count 35
- Test Prefixes 36
- Test Prefixes 37
- Using the Diagnostics 38
- 3Diagnostic Tests 39
- Running the Tests 40
- RAM - Local RAM 41
- SRAM - Static RAM 41
- ADR - Memory Addressing 43
- ALTS - Alternating Ones/Zeros 44
- BTOG - Bit Toggle 45
- Command Input 46
- CODE - Code Execution/Copy 47
- PATS - Data Patterns 48
- PERM - Permutations 51
- QUIK - Quick Write/Read 52
- REF - Memory Refresh Testing 53
- RNDM - Random Data 55
- RTC - MK48T58 Real Time Clock 56
- ADR - NVRAM Addressing 57
- CLK - Check Real Time Clock 59
- RAM - Battery Backed-Up SRAM 61
- MCC - Memory Controller Chip 62
- ACCESSA - Device Access 64
- ACCESSB - Register Access 65
- ADJ - Prescaler Clock Adjust 66
- FAST - FAST Bit 67
- MPUCS - MPU Clock Speed 68
- PCLK - Prescaler Clock 69
- DRAM - DRAM Refresh Timing 70
- A - Timer Counter 71
- B - Timer Free-Run 73
- C - Timer Clear on Compare 74
- D - Timer Overflow Counter 75
- E - Timer Interrupts 76
- VBR - Vector Base Register 78
- MCECC - ECC Memory Board 82
- CBIT - Check-Bit DRAM 84
- EXCPTN - Exceptions 86
- MBE - Multi-Bit-Error 87
- SBE - Single-Bit-Error 88
- SCRUB - Scrubbing 89
- 172-Diag> CMMU CCHCODE 93
- CCHCPYB - Cache Copyback 95
- CCHSC - Cache Supervisor Code 98
- Diagnostic Tests 100
- CCHSD - Cache Supervisor Data 104
- 172-Diag> CMMU CCHTTM 111
- CCHUC - Cache User Code 113
- CCHUD - Cache User Data 119
- MMUSC - MMU Supervisor Code 130
- MMUSD - MMU Supervisor Data 133
- 172-Diag> CMMU MMUSPF 139
- MMUUC - MMU User Code 142
- 172-Diag> CMMU MMUUC 143
- MMUUD - MMU User Data 145
- MMUWP - MMU Write Protect 148
- TTRSC - TTR Supervisor Code 151
- TTRSD - TTR Supervisor Data 153
- TTRUC - TTR User Code 155
- TTRUD - TTR User Data 157
- 172-Diag> CMMU TTRWP 159
- VME2 - VME Interface ASICs 161
- Configuration Parameters 162
- REGA - Register Access 163
- REGB - Register Walking Bit 164
- TACU - Timer Accuracy Test 172
- TMRC - Prescaler Clock Adjust 175
- Messages 177
- TMRH, TMRI - Overflow Counter 180
- TMRJ - Watchdog Timer Counter 181
- LANC - LAN Coprocessor 183
- CST - Chip Self Test 185
- Passed status is returned 187
- 172-Diag>LANC DIAG 187
- OK-Bit =0, F(ail)-Bit =1 187
- RECEIVE Data Time-Out 190
- RECEIVE Status Error: 190
- Expected =05EA, Actual =003C 191
- ILB - Internal Loopback 195
- IRQ - Interrupt Request 198
- 172-Diag>LANC MON 199
- TDF -Time Domain Reflectometry 200
- LANC test group 202
- LANC test group conÞguration 202
- LANC while 203
- ACC1 - Device Access 208
- ACC2 - Register Access 210
- DFIFO - DMA FIFO 212
- IRQ - Interrupts 213
- LPBK - Loopback 216
- SCRIPTS - SCRIPTS Processor 217
- SFIFO - SCSI FIFO 220
- 172-Diag>IPIC ACCESSB 223
- IPIC Error Messages 225
- Message Cause 226
- 172-Diag>SCC ACCESS 229
- IRQ - SCC Interrupt Request 230
- BAUDS - SCC Baud Rates 231
- 172-Diag>SCC ILPBCK 233
- MDMC - SCC Modem Control 234
- SCC Error Messages 235
- FLASH - Flash Memory Tests 237
- ERASE - Erase Flash Memory 239
- FILL - Fill Flash Memory 240
- PATS - Flash Patterns 241
- 4172Bug Environment 245
- 172Bug Environment 246
- ENV - Set Environment 247
- 172Bug 248
- VMEbus Interface Parameters 254
- Configuring IndustryPacks 259
- Saving ENV Parameter Settings 261
- ARelated Documentation 263
- Numerics 265
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