Motorola MPC5200 Manuel d'utilisateur Page 6

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Bright Star Engineering, Inc. Page 1
1 Overview
The p2Engine is a versatile, low-cost, high-power computing platform. The p2Engine
consists of a microprocessor, SDRAM, NOR Flash, NAND Flash, an Ethernet PHY,
USB and EIA/TIA 232 transceivers. Running at 398 MHz, the PPC core performs just
under 760 MIPS.
Design Goals:
Versatile
Industrial temperature range
Common core
Low-cost
High reliability
Small form factor
Features:
Motorola, MPC5200
o PPC 603e G2_LE core
o 760 MIPS at 400 MHz
o 16 kbyte instruction cache and 16 kbyte data cache
o Floating-point unit (FPU)
o Memory management unit (MMU)
o Internal 32-bit, 133 MHz SDR/DDR-SDRAM interface
o Real-time clock (requires external power)
o Ethernet MAC with MII interface
o Serial interfaces, including two CAN and one J1850 interfaces
o Industrial temperature range (−40 °C to 85 °C)
o Two USB interfaces (1 available to user)
64 Mbyte SDRAM running at 132 MHz
8 Mbyte NOR Flash (contains boot image)
32 Mbyte NAND Flash
Two CAN interfaces (external transceiver required)
1 USB Host interface
J1850 interface
10/100 Ethernet interface (10 Mbit/s only when using J1850)
EIA/TIA 232 Console port
Up to 4 additional UART interfaces
Up to 26 GPIO
Up to 9 External interrupts
On board power conversion and sequencing, requires only 3.3 V input.
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