Motorola MVME2700 Series Manuel de service Page 175

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ENV – Set Environment
http://www.motorola.com/computer/literature 6-11
6
ROM First Access Length (0 - 31) = 10?
This is the value programmed into the MPC105 “ROMFAL” field
(Memory Control Configuration Register 8: bits 23-27) to indicate the
number of clock cycles used in accessing the ROM. The lowest allowable
ROMFAL setting is $00; the highest allowable is $1F. The value to enter
depends on processor speed. The default value varies according to the
system’s bus clock speed.
Note ROM First Access Length is not applicable to the
MVME2600/MVME2700/MVME3600/MVME4600. PPCBUG
ignores the configured value.
ROM Next Access Length (0 - 15) = 0?
The value programmed into the MPC105 “ROMNAL” field (Memory
Control Configuration Register 8: bits 28-31) to represent wait states in
access time for nibble (or burst) mode ROM accesses. The lowest
allowable ROMNAL setting is $0; the highest allowable is $F. The value
to enter depends on processor speed. The default value varies according to
the system’s bus clock speed.
Note ROM Next Access Length is not applicable to the
MVME2600/MVME2700/MVME3600/MVME4600. PPCBUG
ignores the configured value
DRAM Parity Enable [On-Detection/Always/Never - O/A/N] = O?
Note This parameter also applies to enabling ECC for DRAM.
O
DRAM parity is enabled upon detection. (Default)
A
DRAM parity is always enabled.
N
DRAM parity is never enabled.
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