Motorola Pro FLX Manuel d'utilisateur télécharger pdf (Page 34)

Design and Implementation of a Practical FLEX Paging Decoder

Grayson Wireless 26

complete description of how the decoder determines each symbol and maintains symbol clock

timing, the reader is referred to Section 3.2 and Figure 3-7 in that section.

Interrupt

Get Middle 8-Bit Shift Register

Determine Bit

Store Bit

Determine Next Symbol Time

4-FSK

Collect

Get Low 8-Bit

Shift Register

Bit Stored

Logic 1

Yes

Return

Get High 8-Bit

Shift Register

Determine Bit

Store Bit

Figure 3-8

Interrupt processing block diagram

At the beginning of a FLEX transmission, the decoder can begin sampling any where in the

symbol period so the decoder needs to move its sampling point to the start of a symbol. The

dotting sequence in the beginning of FLEX synchronization enables the symbol clock

synchronization to move the sampling point to the beginning of a symbol. Figure 3-9 illustrates

the software flow diagram of the main process to decoder a FLEX frame. The software processes

that begin with “Interrupt:” are processes that change the way the interrupt process collects data.

The interrupts collect data at 1600 baud or 3200 baud and as 2-FSK data or 4-FSK data.

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Motorola Pro FLX Manuel d'utilisateur Page 34