Motorola M68CPU32BUG Manuel d'utilisateur télécharger pdf (Page 13)

DEBUG MONITOR DESCRIPTION

M68CPU32BUG/D REV 1 2-12

Before the normal register display information is printed, the exception type information is

displayed. This includes the type of exception with its format/vector word and the following:

Mnemonic Description Offset

SSW Special Status Word +$16

Fault Addr. Faulted Address +$10

Data Data +$0C

Cur. PC Program Counter +$02

Cnt. Reg. Internal Transfer

Count Register

+$14

The upper nibble of the count register (Cnt. Reg.) contains the microcode revision number of the

MCU device. Consult the CPU32 Reference Manual, Section 6 Exception Processing for more

details.

Notice that the target stack pointer is different. The target stack pointer now points to the last

value of the stacked exception stack frame. Examine the exception stack frame using the MD

command.

CPU32Bug>MD (A7):C<CR>

00003FE8 A700 0000 3000 C008 00F0 0000 FFFF 3000 ‘...0.@ p....0.

00003FF8 0000 3000 0001 0065 ..0....e

CPU32Bug>

2.6 FUNCTION CODE SUPPORT

Function codes identify the address space being accessed on any given bus cycle, and are an

extension of the address. The function codes provide additional information required to find the

proper memory location.

For this reason, all debugger commands involving an address field were changed to allow the

specification of function codes:

The caret ( ^ ) symbol following the address field indicates that a function code specification

follows. The function code can be entered by specifying a valid function code mnemonic or by

specifying a number between 0 and 7. The syntax for address and function code specifications

are:

<ADDR>^<FC> Sets the function code to <FC> value.

<ADDR>^^ Toggles the displaying of function code values.

<ADDR>^<FC>= Sets the function code to <FC> and the default function code to <FC>.

The default value at power up is SD.

DEBUG MONITOR DESCRIPTION

M68CPU32BUG/D REV 1 2-9

EXAMPLE Trace one instruction using debugger.

CPU32Bug>RD<CR>

PC =00003000 SR =2700=TR:OFF_S_7_..... VBR =00000000

SFC =5=SD DFC =5=SD USP =00003830 SSP* =00004000

D0 =00000000 D1 =00000000 D2 =00000000 D3 =00000000

D4 =00000000 D5 =00000000 D6 =00000000 D7 =00000000

A0 =00000000 A1 =00000000 A2 =00000000 A3 =00000000

A4 =00000000 A5 =00000000 A6 =00000000 A7 =00004000

00003000 203900100000 MOVE.L ($100000).L,D0

CPU32Bug>T<CR>

PC =00003006 SR =2700=TR:OFF_S_7_..... VBR =00000000

SFC =5=SD DFC =5=SD USP =00003830 SSP* =00004000

D0 =12345678 D1 =00000000 D2 =00000000 D3 =00000000

D4 =00000000 D5 =00000000 D6 =00000000 D7 =00000000

A0 =00000000 A1 =00000000 A2 =00000000 A3 =00000000

A4 =00000000 A5 =00000000 A6 =00000000 A7 =00004000

00003006 D280 ADD.L D0,D1

CPU32Bug>

Notice that the value of the target stack pointer register (A7) has not changed even though a trace

exception has taken place. The user program may use the exception vector table provided by

CPU32Bug or it may create a separate exception vector table of its own.

2.5.2.1 Using CPU32Bug Target Vector Table

CPU32Bug initializes and maintains a vector table area for target programs. A target program is

any user program started by the CPU32Bug with GO or Trace commands. The starting address of

this target-vector table area is the base address of the BCC, described in paragraph 1.6. This

address is loaded into the target-state-vector base register at power-up or during a cold-start reset.

For verification use the RD command immediately after power-up to display the target-state

registers.

CPU32Bug loads the target-vector table with the debugger vectors (listed in Table 2-2) and the

other vector locations with the address of a generalized exception handler (refer to paragraph

2.5.2.3). The target program allocates as many vectors as required by simply writing its own

exception vectors into the table. If the vector locations listed in Table 2-2 are over-written, then

the accompanying debugger functions will be lost.

CPU32Bug maintains a separate vector table for its own use in a 1k byte space in the reserved

memory space. The debugger vector table is completely transparent to the user and no

modifications should ever be made to it.

eescale S

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Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

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Motorola M68CPU32BUG Manuel d'utilisateur Page 13

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