Motorola M68CPU32BUG Manuel d'utilisateur Page 6
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- MARQUE LIVRES
Noté. / 5. Basé sur avis des utilisateurs
GENERAL INFORMATION
M68CPU32BUG/D REV 1 1-2
POWER-UP/RESET
WARM START?
SET DEBUGGER
DIRECTORY
DISPLAY DEBUGGER
NAME AND VERSION
DISPLAY WARM
START MESSAGE
YES
DISPLAY DEBUGGER NAME & VERSION
DISPLAY RESULTS OF CONFIDENCE
TEST
GO TO MAIN
SET DEBUGGER
DIRECTORY
INITILIZE BUG VARIBLES
RUN SYSTEM
CONFIDENCE TEST
NO
MAIN
DISPLAY BUG PROMPT
WAIT FOR INPUT
EXECUTE COMMAND
GO TO MAIN
RESTORE
TARGET STATE
TARGET CODE
EXECPTION
EXCEPTION
HANDLERS
SAVE TARGET
STATE
DISPLAY TARGET
REGISTERS
YES
NO
DOES COMMAND
CAUSE TARGET CODE
EXECUTION
Figure 1-1. CPU32Bug Operation Mode Flow Diagram
GENERAL INFORMATION
M68CPU32BUG/D REV 1 1-3
1.3 USING THIS MANUAL
Those users unfamiliar with debugging packages should read Chapter 1 before attempting to use
CPU32Bug. This provides information about CPU32Bug structure and capabilities.
Paragraph 1.4 Installation and Start-up describes a step-by-step procedure for powering up the
module and obtaining the CPU32Bug prompt on the terminal screen.
For questions about syntax or operation of a particular CPU32Bug command, turn to the
paragraph which describes that particular command in Chapter 3.
Some debugger commands take advantage of the built-in one-line assembler/disassembler. The
command descriptions in Chapter 3 assume that the user is familiar with the
assembler/disassembler functionality. Chapter 4 includes a description of the assembler/
disassembler.
NOTE
In the examples shown, all user inputs are given in bold text. This should clarify
the examples by distinguishing between character input by the user and character
output by CPU32Bug. The symbol <CR> represents the carriage return key on the
user’s terminal keyboard. Whenever this symbol appears it indicates a carriage
return should be entered by the user.
1.4 INSTALLATION AND START-UP
Use the following set-up procedure to enable CPU32Bug to operate with the BCC:
1. Configure the jumpers on the BCC module. Refer to the EVK User’s Manual
Motorola publication number M68332EVK/AD1 or M68331EVK/AD1.
2. Connect the DB-9 serial communication cable connector to the terminal or host
computer which is to be the CPU32Bug system console. Connect the other end of the
cable to P4 on the BCC.
Set up the terminal as follows:
• Eight bits per character
• One stop bit per character
• Parity disable
• 9600 baud rate
Fr
eescale S
emiconduct
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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- M68CPU32BUG DEBUG MONITOR 1
- USER’S MANUAL 1
- M68CPU32BUG/D 1
- TABLE OF CONTENTS 2
- LIST OF FIGURES 3
- LIST OF TABLES 3
- 1.5 SYSTEM RESTART 5
- CHAPTER 1 5
- GENERAL INFORMATION 5
- 1.1 INTRODUCTION 5
- 1.2 GENERAL DESCRIPTION 5
- 1.3 USING THIS MANUAL 6
- 1.6 MEMORY REQUIREMENTS 7
- CHAPTER 2 9
- DEBUG MONITOR DESCRIPTION 9
- 2.1 INTRODUCTION 9
- Freescale Semiconductor, Inc 10
- 2.6 FUNCTION CODE SUPPORT 13
- CHAPTER 3 16
- DEBUG MONITOR COMMANDS 16
- 3.1 INTRODUCTION 16
- BC Block of Memory Compare BC 17
- BF Block of Memory Fill BF 17
- BS Block of Memory Search BS 19
- BM Block of Memory Move BM 19
- BR Breakpoint Insert BR 20
- BV Block of Memory Verify BV 21
- DU Dump S-Records DU 23
- DC Data Conversion DC 23
- GN Go To Next Instruction GN 25
- GO Go Execute User Program GO 27
- HE Help HE 29
- MA Macro Define/Display MA 31
- MAE Macro Edit MAE 33
- MM Memory Modify MM 35
- MD Memory Display MD 36
- MS Memory Set MS 38
- PF Port Format PF 39
- PA Printer Attached PA 40
- RD Register Display RD 41
- RS Register Set RS 43
- RESET Cold/Warm Reset RESET 44
- RM Register Modify RM 44
- T Trace T 45
- SD Switch Directories SD 45
- TM Transparent Mode TM 48
- 4.2SOURCE PROGRAM CODING 51
- CHAPTER 4 52
- ASSEMBLER/DISASSEMBLER 52
- 4.1 INTRODUCTION 52
- 5.2 SYSTEM CALL ROUTINES 57
- CHAPTER 5 58
- SYSTEM CALLS 58
- 5.1 INTRODUCTION 58
- .ERASLN Erase Line .ERASLN 61
- .OUTSTR .OUTSTR 66
- .SNDBRK Send Break .SNDBRK 68
- .TM_RD Read Timer .TM_RD 70
- .WRITELN .WRITELN 71
- .WRITDLN .WRITDLN 71
- 6.3 UTILITIES 73
- CHAPTER 6 73
- DIAGNOSTIC FIRMWARE GUIDE 73
- 6.1 INTRODUCTION 73
- 6.2 DIAGNOSTIC MONITOR 73
- CPU B Instruction Test CPU B 75
- CPU CPU Tests For The MCU CPU 76
- CPU A Register Test CPU A 76
- CPU C Address Mode Test CPU C 77
- MT Memory Tests MT 78
- MT D Set Bus Data Width MT D 79
- MT A Set Function Code MT A 79
- MT B Set Start Address MT B 80
- MT C Set Stop Address MT C 80
- MT H Random Byte Test MT H 81
- MT E March Address Test MT E 81
- MT F Walk a Bit Test MT F 82
- MT G Refresh Test MT G 82
- MT I Program Test MT I 83
- MT J Test and Set Test MT J 84
- BERR Bus Error Test BERR 84
- APPENDIX A 85
- S-RECORD INFORMATION 85
- A.1 INTRODUCTION 85
- A.2 S-RECORD CONTENT 85
- A.3 S-RECORD TYPES 86
- A.4 S-RECORDS CREATION 86
- C.2 CPU32BUG CUSTOMIZATION 87
- APPENDIX B 87
- SELF-TEST ERROR MESSAGES 87
- B.1 INTRODUCTION 87
- APPENDIX C 88
- USER CUSTOMIZATION 88
- C.1 INTRODUCTION 88
- C.3 CUSTOMIZATION TABLE 90
- C.4 COMMUNICATION FORMATS 93
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