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Noté. / 5. Basé sur avis des utilisateurs
CPCI-6115 CompactPCI Single Board Computer Installation and Use (6806800A68D)
Transition Module Preparation and Installation PMC I/O Connector
110
The 80mm is “cut out of the middle” of the PMC I/O module. This means that features in the
front half of the module keep their positioning relative to the front edge of the board while
features in the back half of the board keep their positioning relative to the back edge of the
board.
5.7.9 PMC I/O Connector
The mapping used by the CPCI-6115 SBC of the PMC I/O connectors onto the CompactPCI
user I/O connectors is reversed by the CPCI-6115-MCPTM. This allows the designer of a PMC
to create a PMC I/O module without knowledge of how the CPCI-6115 SBC maps signals
through the backplane. There is nothing to tie the PMC I/O module to the CPCI-6115 SBC
platform and in this sense the module is “universal”.
5.7.10 Host I/O Connector
The second connector on the PMC I/O module is used to provide power and ground to the
module. In addition, the remaining pins may be used for host I/O signals. Any host I/O
functionality for which there is no space available, or which the cost of does not justify its
presence on the standard board, may be implemented in a “host I/O module”. This functionality
is special to the host (in this case the CPCI-6115 SBC) and so the host I/O module is not a
“universal” module. However, if the host I/O connector pinout is reused on future transition
modules, the host I/O module may be reused.
If possible, optional host I/O routed to the host I/O connector will be terminated in such a fashion
that the host does not incorrectly determine that a device is connected to that I/O when no
module is present. This termination must not interfere with normal operation of the I/O when a
module is present.
5.7.11 PMC I/O Module Presence Detection and Identification
Presence detection and identification of PMC I/O modules is currently an open issue. It is
anticipated that PMCs and PMC I/O modules will be designed as pairs. Any and all of the 64
bits of PMC user I/O are available to the designers to use as they wish to detect and identify an
installed PMC I/O module. No standard exists, or is likely to exist, so hopefully the method
chosen will be sufficiently robust to prevent accidental misidentification of modules.
Host I/O modules also need to be detected and identified. To this end the I2C bus provided from
the CPCI-6115 SBC is connected to both PMC I/O module sites. The addresses and content of
the I2C devices to reside on the Host I/O module remain an open issue.
- CPCI-6115 CompactPCI 1
- Single Board Computer 1
- Trademarks 2
- Contents 3
- List of Tables 10
- List of Figures 11
- About this Manual 13
- Abbreviations 14
- Conventions 16
- Summary of Changes 17
- Comments and Suggestions 18
- Safety Notes 19
- Operation 20
- Installation 20
- Cabling and Connectors 21
- Environment 22
- Sicherheitshinweise 23
- Schaltereinstellungen/Jumper 24
- Kabel und Stecker 26
- Umweltschutz 26
- Batterie 26
- Introduction 27
- 1.2 Standard Compliances 28
- 1.3 Ordering Information 29
- 2.1 Overview 31
- Requirements 32
- 2.3.2 Power Requirements 34
- 2.3.3 Thermal Requirements 34
- 2.4 Getting Started 37
- 2.5 Baseboard Preparation 38
- 2.5.3 J6, Bus Mode Selection 40
- 2.5.7 J20, Safe Start Header 42
- 2.6 Operating Modes 44
- 2.7 Installing Hardware 44
- Procedure 45
- Personal Injury or Death 46
- 2.9 Applying Power 49
- 3.1 Overview 51
- 3.2 Board Layout 52
- 3.4 ABORT/Reset Switch 54
- 3.5.7 CompactPCI Connector 58
- PCI_RSVD = PCI Reserved pin 62
- 3.5.14 Safe Start Header 67
- 3.5.15 Bus Mode Select Header 67
- 3.5.18 +/-12 V Present Header 68
- Functional Description 69
- 4.2 Block Diagram 70
- 4.3 General Description 71
- 4.3.2 Processor 72
- 4.3.3 L3 Cache 72
- 4.3.4.12 Interrupt Controller 76
- 4.3.4.13 PCI Bus Arbitration 76
- 4.3.4.14 Board Reset Logic 77
- 4.3.5 System Memory 81
- 4.3.6 Flash Memory 82
- 4.3.8 TL16C550C UART Devices 83
- 4.3.9 System Registers 83
- 4.3.10 Serial EEPROM Devices 83
- 4.3.11 PCI Bus 0.0 83
- 4.3.12 PCI Bus 1.0 83
- 4.3.13 IDE Controller 84
- 4.3.15 CompactPCI Bus 84
- 4.3.16 PMC Slots 84
- 4.4 Miscellaneous 86
- 4.4.3 Onboard Power Supplies 89
- 4.4.4 Hot Swap Support 89
- 4.4.5 Hot Swap Process 89
- 5.2 Block Diagram 92
- 5.4 Rear Panel Connectors 94
- 5.5.2.1 Host IO Connectors 96
- 5.5.2.2 PMC I/O Connectors 98
- 5.6 Jumper Settings 104
- 5.7 Functional Description 105
- 5.7.3 Hot-Swap Support 106
- 5.7.4 Serial EEPROM 106
- 5.7.5 PMC I/O Modules 106
- 5.7.7 PMC I/O Module 110
- 5.7.9 PMC I/O Connector 112
- 5.7.10 Host I/O Connector 112
- 5.8 Installing the PIM 113
- Figure 5-9 Installing the PIM 114
- Remote Start via the PCI Bus 117
- MOTLoad Firmware 119
- 7.4 MOTLoad Commands 120
- 7.6 MOTLoad Tests 120
- 7.7 Using MOTLoad 121
- 7.7.2 Command Line Help 122
- 7.7.3 Command Line Rules 122
- 7.8 MOTLoad Command List 123
- Memory Maps 127
- 8.2.2 Processor Memory Map 128
- 8.2.3 Default PCI Memory Map 129
- 8.2.5 System I/O Memory Map 131
- 8.2.7 CompactPCI Memory Map 131
- 8.2.9 L1, L2 and L3 Cache 132
- 8.2.10 System Memory 132
- A Related Documentation 133
- A.3 Related Specifications 134
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